CITCAT: Constructing Instruction Traces From Cache-Filtered Address Traces

Instruction traces are useful tools for studying many aspects of computer systems, but they are difficult to gather without perturbing the systems being traced. In the past, researchers have collected instruction traces through various techniques, including single-stepping, instruction inlining, hardware monitoring, and processor simulation. These approaches, however, fail to produce accurate traces because they interfere with the processor’s normal execution. Because processors are deterministic machines, hypothetical components to real-world demands, their behavior can be predicted if their initial states and external inputs are known. We have developed a technique, called “CITCAT, ” which exploits this fact to generate nearly perfect instruction trace