In trace processors, a sequential program is partitioned at run time into "traces." A trace is an encapsulation of a dynamic sequence of instructions. A processor that uses traces as the unit of sequencing and execution achieves high instruction fetch rates and can support very wide-issue execution engines. We propose a new class of hardware optimizations that transform the instructions within traces to increase the performance of trace processors. Traces are "pre-processed" to optimize the instructions for execution together. We propose three specific optimizations: instruction scheduling, constant propagation, and instruction collapsing. Together, these optimizations offer substantial performance benefit, increasing p...
The use of Trace Caches is a well known technique to overcome the problem of limited instruction fet...
Fetch performance is a very important factor because it effectively limits the overall processor per...
The design of higher performance processors has been following two major trends: increasing the pipe...
In high-performance processors, increasing the number of instructions fetched and executed in parall...
Trace cache, an instruction fetch technique that reduces taken branch penalties by storing and fetch...
To maximize the performance of a wide-issue superscalar processor, the fetch mechanism must be capab...
We explore the use of compiler optimizations, which optimize the layout of instructions in memory. T...
The exponentially increasing gap between processors and off-chip memory, as measured in processor cy...
Trace processors rely on hierarchy, replication, and prediction to dramatically increase the executi...
The design of higher performance processors has been following two major trends: increasing the pipe...
As the issue width of superscalar processors is increased, instruction fetch bandwidth requirements ...
The Software Trace Cache is a compiler transformation, or a postcompilation binary optimization, tha...
Trace-level reuse is based on the observation that some traces (dynamic sequences of instructions) a...
As the instruction issue width of superscalar proces-sors increases, instruction fetch bandwidth req...
Instruction traces are useful tools for studying many aspects of computer systems, but they are diff...
The use of Trace Caches is a well known technique to overcome the problem of limited instruction fet...
Fetch performance is a very important factor because it effectively limits the overall processor per...
The design of higher performance processors has been following two major trends: increasing the pipe...
In high-performance processors, increasing the number of instructions fetched and executed in parall...
Trace cache, an instruction fetch technique that reduces taken branch penalties by storing and fetch...
To maximize the performance of a wide-issue superscalar processor, the fetch mechanism must be capab...
We explore the use of compiler optimizations, which optimize the layout of instructions in memory. T...
The exponentially increasing gap between processors and off-chip memory, as measured in processor cy...
Trace processors rely on hierarchy, replication, and prediction to dramatically increase the executi...
The design of higher performance processors has been following two major trends: increasing the pipe...
As the issue width of superscalar processors is increased, instruction fetch bandwidth requirements ...
The Software Trace Cache is a compiler transformation, or a postcompilation binary optimization, tha...
Trace-level reuse is based on the observation that some traces (dynamic sequences of instructions) a...
As the instruction issue width of superscalar proces-sors increases, instruction fetch bandwidth req...
Instruction traces are useful tools for studying many aspects of computer systems, but they are diff...
The use of Trace Caches is a well known technique to overcome the problem of limited instruction fet...
Fetch performance is a very important factor because it effectively limits the overall processor per...
The design of higher performance processors has been following two major trends: increasing the pipe...