This paper proposes a new efficient buffer management technique called shift buffering for automatic code synthesis from synchronous dataflow graphs (SDF). Two previous buffer management methods, linear buffering and modulo (or circular) buffering, assume that samples are queued in the arc buffers in the arrival order and are accessed by moving the buffer indices. But both methods have significant overhead for general multi-rate systems: the linear buffering method requires large size buffers and the modulo buffering method needs run-time overhead of buffer index computation. The proposed shift buffering method shifts samples rather than moving buffer indices. We develop optimal shift buffering algorithms to minimize the number of shifted s...
International audienceThis paper introduces and assesses a new technique to minimize the memory foot...
In this paper, we propose a new single appearance schedule for synchronous dataflow programs to mini...
Due to the limited amount of memory resources in em-bedded systems, minimizing the memory requiremen...
This paper minimizes the buffer size and the buffer memory management performance overhead for a syn...
In multimedia and graphics applications, data samples of nonprimitive type require significant amoun...
This paper presents efficient automatic code synthesis techniques from dataflow graphs for multimedi...
Synchronous Dataflow, a subset of dataflow, has proven to be a good match for specifying DSP program...
In this paper we discuss a method to perform compile-time buffer allocation, allowing efficient buff...
Large-grain synchronous dataflow graphs or multi-rate graphs have the distinct feature that the node...
Commercial high-level synthesis tools typically produce statically scheduled circuits. Yet, effectiv...
A key step in the design of cyclo-static real-time systems is the determination of buffer capacities...
Abstract — Synchronous Dataflow (SDF) is a well-known model of computation for dataflow-oriented app...
Abstract- This paper concerns area-efficient automatic hardware architecture synthesis and its optim...
In this paper, we develop a new technique called buffer merging for reducing memory requirements of ...
The goal of buffer allocation for real-time streaming applications, modeled as dataflow graphs, is t...
International audienceThis paper introduces and assesses a new technique to minimize the memory foot...
In this paper, we propose a new single appearance schedule for synchronous dataflow programs to mini...
Due to the limited amount of memory resources in em-bedded systems, minimizing the memory requiremen...
This paper minimizes the buffer size and the buffer memory management performance overhead for a syn...
In multimedia and graphics applications, data samples of nonprimitive type require significant amoun...
This paper presents efficient automatic code synthesis techniques from dataflow graphs for multimedi...
Synchronous Dataflow, a subset of dataflow, has proven to be a good match for specifying DSP program...
In this paper we discuss a method to perform compile-time buffer allocation, allowing efficient buff...
Large-grain synchronous dataflow graphs or multi-rate graphs have the distinct feature that the node...
Commercial high-level synthesis tools typically produce statically scheduled circuits. Yet, effectiv...
A key step in the design of cyclo-static real-time systems is the determination of buffer capacities...
Abstract — Synchronous Dataflow (SDF) is a well-known model of computation for dataflow-oriented app...
Abstract- This paper concerns area-efficient automatic hardware architecture synthesis and its optim...
In this paper, we develop a new technique called buffer merging for reducing memory requirements of ...
The goal of buffer allocation for real-time streaming applications, modeled as dataflow graphs, is t...
International audienceThis paper introduces and assesses a new technique to minimize the memory foot...
In this paper, we propose a new single appearance schedule for synchronous dataflow programs to mini...
Due to the limited amount of memory resources in em-bedded systems, minimizing the memory requiremen...