Architecture of a Reconfigurable Processor for Implementing Search Algorithms over Discrete Matrices

Abstract. The paper suggests architecture of a reconfigurable processor, which can be customized for implementing different search algorithms over discrete matrices. Such algorithms might be used for solving various problems of combinatorial optimization, such as covering, Boolean satisfiability, etc. The proposed architecture contains memory blocks for a binary or a ternary matrix, general-purpose registers, five stacks, that make possible to carry out recursive search procedures based on a decision tree, and a reprogrammable functional unit that allows to perform the required operations over binary and ternary vectors. Two levels of control circuits have been suggested. The first (top) level permits to realize the search algorithm. The second (bottom) level allows operations that are required for the algorithm to be implemented