OpenCL is an emerging platform for parallel computing that promises porta-bility of applications across different architectures. This promise is seriously undermined, however, by the frequent use of floating-point arithmetic in scien-tific applications. Floating-point computations can yield vastly different results on different architectures — even IEEE 754-compliant ones —, potentially caus-ing changes in control flow and ultimately incorrect (not just imprecise) output for the entire program. In this paper, we illustrate a few instances of non-trivial diverging floating-point computations and thus present a case for rigorous static analysis and verification methods for parallel floating point software running on IEEE-754 2008 compliant ha...
International audienceThis handbook is a definitive guide to the effective use of modern floating-po...
Throughout academia and industry, formal verification techniques have become essential for asserting...
We present a methodology for generating floating-point arithmetic hardware designs which are, for su...
Methodology to systematically identify and isolate bugs in floating point implementation in highperf...
Floating-point computations are at the heart of much of the computing done in high energy physics. ...
Scientific applications rely heavily on floating-point arithmetic and, therefore, are affected by th...
The floating point standard IEEE 754 is widely implemented, but many of its capabilities are not wel...
This paper overviews the application of formal verification techniques to hardware ingeneral, and to...
This work presents a new fast and efficient algorithm for a floating point multiplier that adheres t...
This development provides a formal model of IEEE-754 floating-point arithmetic. This formalization, ...
Abstract—Automated reasoning tools often provide little or no support to reason accurately and effic...
The proliferation of heterogeneous computing systems presents the parallel computing community with ...
The floating point standard IEEE 754 is widely implemented, but many of its capabilities are not wel...
Floating-point numbers are broadly received in numerous applications due their element representatio...
This handbook is a definitive guide to the effective use of modern floating-point arithmetic, which ...
International audienceThis handbook is a definitive guide to the effective use of modern floating-po...
Throughout academia and industry, formal verification techniques have become essential for asserting...
We present a methodology for generating floating-point arithmetic hardware designs which are, for su...
Methodology to systematically identify and isolate bugs in floating point implementation in highperf...
Floating-point computations are at the heart of much of the computing done in high energy physics. ...
Scientific applications rely heavily on floating-point arithmetic and, therefore, are affected by th...
The floating point standard IEEE 754 is widely implemented, but many of its capabilities are not wel...
This paper overviews the application of formal verification techniques to hardware ingeneral, and to...
This work presents a new fast and efficient algorithm for a floating point multiplier that adheres t...
This development provides a formal model of IEEE-754 floating-point arithmetic. This formalization, ...
Abstract—Automated reasoning tools often provide little or no support to reason accurately and effic...
The proliferation of heterogeneous computing systems presents the parallel computing community with ...
The floating point standard IEEE 754 is widely implemented, but many of its capabilities are not wel...
Floating-point numbers are broadly received in numerous applications due their element representatio...
This handbook is a definitive guide to the effective use of modern floating-point arithmetic, which ...
International audienceThis handbook is a definitive guide to the effective use of modern floating-po...
Throughout academia and industry, formal verification techniques have become essential for asserting...
We present a methodology for generating floating-point arithmetic hardware designs which are, for su...