Operating System Structures for Multiprocessor Systems on Programmable Chip

Abstract—Chips are moving from single-core systems to much more complex, heterogeneous manycore systems. While heterogeneous architectures promise high performance, they are also challenging our ability to port our existing operating systems to abstract the heterogeneous components into a unified architecture. Baseline solutions to resolve heterogeneity issues within manycores use Remote Procedure Calls (RPC) for applications running on slave processors to access a traditional monolithic kernel running on a common master node. Micro-kernels are once again re-emerging to eliminate the central bottleneck of the monolithic kernel. In both cases the RPC methods used for communications increase the overhead of system services, counter to the desire of breaking threads up into finer grained services to match and scale with in-creasing numbers of processors. In this paper we show how new invocation mechanisms built as hardware primitives in combination with new a new hw/sw co-designed microkernel can resolve heterogeneity issues in a framework that supports the level of scalability required for next generation systems. We present experimental results as well as a new queuing model to show how both monolithic and microkernels that rely historical interrupt mechanisms cannot support scalability beyond small numbers of processors. We also show through these results the potential scalability of a hardware kernel based microkernel with new lightweight invocation mechanisms. Keywords-microkernel, multiprocessor system, operating sys-tem, reconfigurable computing I