Modern multicore processors provide performance counters that export information on various essential aspects of software execution, from instruction decoding to cache utilization. Typically, a processor is capable of counting a small subset from hundreds of different event types, the events themselves can occur almost every processor clock tick. This yields a significant amount of data which is difficult to collect without disrupting the execution itself. The goal of the thesis is to apply compressive sampling - a special method of sampling signals that allows to reconstruct sparse signal from a small number of samples - to the performance counter data
infrastructure for performance on multi-core platforms With maturing compiler technologies, compilet...
Performance evaluation tools enable analysts to shed light on how applications behave both from a ge...
Identifying design patterns that limit the performance of multi-core algorithms is a challenging tas...
Modern multicore processors provide performance counters that export information on various essentia...
Abstract-Performance monitoring of data centers provides vital information for dynamic resource prov...
Supercomputers play a key role in countless areas of science and engineering, enabling the developme...
Concurrency levels in large-scale, distributed-memory supercomputers are rising exponentially. Moder...
One of the major architectural design considerations for any computer system is that of the memory s...
This paper presents a novel approach to estimating and predicting the system-wide utilisation of com...
CPU clock frequency is not likely to be increased significantly in the coming years, and data analys...
To reduce latency and increase bandwidth to memory, modern microprocessors are designed with deep me...
International audienceThe aim of this paper is to present a high precision and event-versatile MBPTA...
Over the past several de ades, mi ropro essors have evolved to assist system software in implementin...
Memory contention is one of the largest sources of inter-core interference in statically partitioned...
Contemporary microprocessors provide a rich set of integrated performance counters that allow applic...
infrastructure for performance on multi-core platforms With maturing compiler technologies, compilet...
Performance evaluation tools enable analysts to shed light on how applications behave both from a ge...
Identifying design patterns that limit the performance of multi-core algorithms is a challenging tas...
Modern multicore processors provide performance counters that export information on various essentia...
Abstract-Performance monitoring of data centers provides vital information for dynamic resource prov...
Supercomputers play a key role in countless areas of science and engineering, enabling the developme...
Concurrency levels in large-scale, distributed-memory supercomputers are rising exponentially. Moder...
One of the major architectural design considerations for any computer system is that of the memory s...
This paper presents a novel approach to estimating and predicting the system-wide utilisation of com...
CPU clock frequency is not likely to be increased significantly in the coming years, and data analys...
To reduce latency and increase bandwidth to memory, modern microprocessors are designed with deep me...
International audienceThe aim of this paper is to present a high precision and event-versatile MBPTA...
Over the past several de ades, mi ropro essors have evolved to assist system software in implementin...
Memory contention is one of the largest sources of inter-core interference in statically partitioned...
Contemporary microprocessors provide a rich set of integrated performance counters that allow applic...
infrastructure for performance on multi-core platforms With maturing compiler technologies, compilet...
Performance evaluation tools enable analysts to shed light on how applications behave both from a ge...
Identifying design patterns that limit the performance of multi-core algorithms is a challenging tas...