Modeling Cache Locality with Extra-P

HPC applications usually run at a low fraction of the computer's peak performance. Empirical performance modeling is a helpful tool for automatically assessing the scaling behavior of applications, thereby finding bottlenecks and facilitating the process of improving an application's performance. Current tools for performance modeling neglect the cache behavior of applications, although it plays a significant role for overall performance due to the increasing gap between memory and processor speed. In this thesis, by creating an interface between ThreadSpotter, an open source memory sampler, and Extra-P, a tool for performance modeling, we present and evaluate a methodology to model how scaling affects an application's memory access locality, allowing the developer to easily find scalability bugs that impact the application's cache utilization and so helping to improve computing performance. For each instruction group, our performance models describe how parameters such as processor count or problem size influence the distribution of reuse distances and stack distances. Our novel toolset is evaluated on the HPC applications Kripke, LULESH, MILC, OpenFOAM and Relearn