Copper nanoparticles (Cu NPs) fabricated by physical vapor deposition (PVD) were introduced in Cu-Cu bonding as surface modification. The bonding structure with Ti adhesive/barrier layer and Cu substrate layer was fabricated on both surfaces first. Loose structure with Cu NPs was then deposited by magnetron sputtering in a high pressure environment. Solid state Cu-Cu bonding process was accomplished at 200°C for 3min under the pressure of 20MPa. Die shear test was carried out and an average bonding strength of 36.75MPa was achieved. The analysis of fracture surface revealed a high-reliability bonding structure. According to cross-sectional observations, a void-free intermediate Cu layer with thickness around 10nm was obtained. These results...
Deposition of Ultra-thin Titanium (Ti) layer (3 nm) on Copper (Cu) surface inhibits surface oxidatio...
Low-temperature Cu-Cu bonding technology plays a key role in high-density and high-performance 3D in...
In this paper, we report the methodology of achieving low temperature, low pressure CMOS compatible ...
A novel reliable low temperature short time Cu-Cu bonding method using Ag nanostructure for 3D integ...
Abstract A reliable Cu–Cu bonding joint was achieved by using the highly sinterable Cu nanoparticle ...
One of the primary and critical requirements for high quality wafer level thermocompression Copper-C...
To replace Al–Ge eutectic bonding, low-temperature direct Cu-to-Cu bonding was developed in this stu...
Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Materials Science and Engineering, ...
One of the key methods to form interconnects between electrical packages and devices is by thermocom...
In the present modern era of electronic industry has motivated for high performance integration by v...
In 3D IC integration, a critical demand of interfacial joints in high-end devices is ultra-fine pitc...
A novel low-temperature Cu-Cu bonding approach called the insertion bonding technique has been devel...
In this paper, we investigate low temperature, low pressure and fine-pitch Copper-Copper thermo-comp...
The increasing demand for system performance enhancement and more functionality has led to the explo...
Cu-to-Cu direct bonding is one of the key technologies for three-dimensional (3D) chip stacking. Thi...
Deposition of Ultra-thin Titanium (Ti) layer (3 nm) on Copper (Cu) surface inhibits surface oxidatio...
Low-temperature Cu-Cu bonding technology plays a key role in high-density and high-performance 3D in...
In this paper, we report the methodology of achieving low temperature, low pressure CMOS compatible ...
A novel reliable low temperature short time Cu-Cu bonding method using Ag nanostructure for 3D integ...
Abstract A reliable Cu–Cu bonding joint was achieved by using the highly sinterable Cu nanoparticle ...
One of the primary and critical requirements for high quality wafer level thermocompression Copper-C...
To replace Al–Ge eutectic bonding, low-temperature direct Cu-to-Cu bonding was developed in this stu...
Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Materials Science and Engineering, ...
One of the key methods to form interconnects between electrical packages and devices is by thermocom...
In the present modern era of electronic industry has motivated for high performance integration by v...
In 3D IC integration, a critical demand of interfacial joints in high-end devices is ultra-fine pitc...
A novel low-temperature Cu-Cu bonding approach called the insertion bonding technique has been devel...
In this paper, we investigate low temperature, low pressure and fine-pitch Copper-Copper thermo-comp...
The increasing demand for system performance enhancement and more functionality has led to the explo...
Cu-to-Cu direct bonding is one of the key technologies for three-dimensional (3D) chip stacking. Thi...
Deposition of Ultra-thin Titanium (Ti) layer (3 nm) on Copper (Cu) surface inhibits surface oxidatio...
Low-temperature Cu-Cu bonding technology plays a key role in high-density and high-performance 3D in...
In this paper, we report the methodology of achieving low temperature, low pressure CMOS compatible ...