11th IEEE International Symposium on Industrial Embedded Systems (SIES 2016). 23 to 25, May, 2016. Krakow, Poland.Software transactional memory (STM) is a synchronisation paradigm which improves the parallelism and composability of modern applications executing on a multi-core architecture. However, to abort and retry a transaction multiple times may have a negative impact on the temporal characteristics of a real-time task set. This paper addresses this issue: It provides a framework in which an upper-bound on the worst-case response time of each task is derived, assuming that tasks are scheduled by following either the Non-Preemptive During Attempt (NPDA), Non-Preemptive Until Commit (NPUC) or Stack Resource Policy for Transactional Memor...
Lock-based concurrency control suffers from programmability, scalability, and composability challeng...
We consider software transactional memory (STM) concurrency control for embedded multicore real-time...
For any real-time system, being predictable with respect to time is a basic necessity. The combinati...
We consider multiprocessor distributed real-time systems where concurrency control is managed using ...
8 pagesInternational audienceWhile real-time applications are becoming more and more concurrent and ...
The foreseen evolution of chip architectures to higher number of, heterogeneous, cores, with non-un...
Programmers resort to user-level parallel frameworks in order to exploit the parallelism provided by...
Abstract—As multiprocessor systems are increasingly used in real-time environments, scheduling and s...
11th IEEE International Symposium on Industrial Embedded Systems (SIES 2016). 23 to 25, May, 2016. K...
Abstract—Transactional memory is currently a hot research topic, having attracted the focus of both ...
9 pagesInternational audienceTransactional memory is currently a hot research topic, having attracte...
Abstract—Software Transactional Memory (STM) is an op-timistic concurrency control mechanism that si...
Memory controller design is challenging as mixed time-criticality embedded systems feature an increa...
Software transactional memory (STM) is an optimistic concurrency control mechanism that simplifies p...
Recent embedded processor architectures containing multiple heterogeneous cores and non-coherent ca...
Lock-based concurrency control suffers from programmability, scalability, and composability challeng...
We consider software transactional memory (STM) concurrency control for embedded multicore real-time...
For any real-time system, being predictable with respect to time is a basic necessity. The combinati...
We consider multiprocessor distributed real-time systems where concurrency control is managed using ...
8 pagesInternational audienceWhile real-time applications are becoming more and more concurrent and ...
The foreseen evolution of chip architectures to higher number of, heterogeneous, cores, with non-un...
Programmers resort to user-level parallel frameworks in order to exploit the parallelism provided by...
Abstract—As multiprocessor systems are increasingly used in real-time environments, scheduling and s...
11th IEEE International Symposium on Industrial Embedded Systems (SIES 2016). 23 to 25, May, 2016. K...
Abstract—Transactional memory is currently a hot research topic, having attracted the focus of both ...
9 pagesInternational audienceTransactional memory is currently a hot research topic, having attracte...
Abstract—Software Transactional Memory (STM) is an op-timistic concurrency control mechanism that si...
Memory controller design is challenging as mixed time-criticality embedded systems feature an increa...
Software transactional memory (STM) is an optimistic concurrency control mechanism that simplifies p...
Recent embedded processor architectures containing multiple heterogeneous cores and non-coherent ca...
Lock-based concurrency control suffers from programmability, scalability, and composability challeng...
We consider software transactional memory (STM) concurrency control for embedded multicore real-time...
For any real-time system, being predictable with respect to time is a basic necessity. The combinati...