This thesis introduces a new technique, and its associated tool SOAP, to automatically perform source-to-source optimization of numerical programs, specifically targeting the trade-off among numerical accuracy, latency, and resource usage as a high-level synthesis flow for FPGA implementations. A new intermediate representation, MIR, is introduced to carry out the abstraction and optimization of numerical programs. Equivalent structures in MIRs are efficiently discovered using methods based on formal semantics by taking into account axiomatic rules from real arithmetic, such as associativity, distributivity and others, in tandem with program equivalence rules that enable control-flow restructuring and eliminate redundant array accesses. ...
Embedded systems raise many challenges in power, space and speed efficiency. The current trend is to...
In today's increasingly heterogeneous compute landscape, there is high demand for design tools that ...
With increasing FPGA chip density, it is possible to implement more sophisticated algorithms on FPGA...
High-level synthesis (HLS) tools offer increased productivity regarding FPGA programming. However, d...
Increases in the capacities and features of FPGAs has opened a new perspective on their use as appli...
Many numerical simulation applications from the scientific, financial and machine-learning domains r...
International audienceFPGAs are well known for their ability to perform non-standard computations no...
Many scenarios demand a high processing power often combined with a limited energy budget. A way to ...
Automated hardware design from behavior-level abstraction has drawn wide interest in FPGA-based acce...
High-level synthesis is a powerful tool for increasing productivity in digital hardware design. Howe...
The advent of FPGA-based accelerators has encouraged the use of high-level synthesis (HLS) for rapid...
High-level synthesis (HLS) tools simplify the FPGA design processes by allowing users to express the...
Computer hardware keeps increasing in complexity. Software design needs to keep up with this. The ri...
In the last decade floating-point matrix multiplication on FPGAs has been studied extensively and ef...
This paper presents a workflow for synthesizing near-optimal FPGA implementations of structured-mesh...
Embedded systems raise many challenges in power, space and speed efficiency. The current trend is to...
In today's increasingly heterogeneous compute landscape, there is high demand for design tools that ...
With increasing FPGA chip density, it is possible to implement more sophisticated algorithms on FPGA...
High-level synthesis (HLS) tools offer increased productivity regarding FPGA programming. However, d...
Increases in the capacities and features of FPGAs has opened a new perspective on their use as appli...
Many numerical simulation applications from the scientific, financial and machine-learning domains r...
International audienceFPGAs are well known for their ability to perform non-standard computations no...
Many scenarios demand a high processing power often combined with a limited energy budget. A way to ...
Automated hardware design from behavior-level abstraction has drawn wide interest in FPGA-based acce...
High-level synthesis is a powerful tool for increasing productivity in digital hardware design. Howe...
The advent of FPGA-based accelerators has encouraged the use of high-level synthesis (HLS) for rapid...
High-level synthesis (HLS) tools simplify the FPGA design processes by allowing users to express the...
Computer hardware keeps increasing in complexity. Software design needs to keep up with this. The ri...
In the last decade floating-point matrix multiplication on FPGAs has been studied extensively and ef...
This paper presents a workflow for synthesizing near-optimal FPGA implementations of structured-mesh...
Embedded systems raise many challenges in power, space and speed efficiency. The current trend is to...
In today's increasingly heterogeneous compute landscape, there is high demand for design tools that ...
With increasing FPGA chip density, it is possible to implement more sophisticated algorithms on FPGA...