The Effects of Instruction Set Variation on a Reconfigurable Processor

The emerging field of reconfigurable computing promises increased processing power in terms of speed and function with only a modest investment in hardware. The goal of this experiment was to test this premise. Using a FPGA, a CPU was implemented in Verilog HDL. The CPU was then tested to measure the improvement of program execution time through the use of hardwired instructions in a reconfigurable system. Secondly, the predicted gain in reconfigurable resources as function of the number of instructions was tested in a reconfigurable environment. The results of the experiment suggest reconfigurable computing can provide marginal changes in resources allocated and significant improvements in program execution time