Reconfigurable instruction set processors from a hardware/software perspective

Reconfigurable instruction set processors have the capability to adapt their instruction sets to the application being executed through a reconfiguration in their hardware. Through this adaptation, they are expected to achieve a great improvement in performance compared to fixed instruction set processors. In this paper, we discuss the different hardware aspects that have to be considered during the design of such a reconfigurable processor. The topics discussed include the coupling of the processor and the reconfigurable logic, configuration, instruction coding and scheduling, granularity, hardware cache and reconfigurability. A classification of current reconfigurable processors is done according to the discussed topics.