We have proposed an auto-memoization processor based on computation reuse, and merged it with speculative multi-threading based on value prediction into a parallel speculative execution. In the parallel speculative execution model, speculative cores do not work when the target instruction region is not suitable for computation reuse. This paper proposes a new parallel speculative execution model where the idle speculative cores execute scout threads for reducing cache miss penalties. The scout thread is based on value prediction, and can handle an instruction region which accesses the addresses with several strides. It also can reduce execution cycles by raising computation reuse ratio. The result of the experiment with SPEC CPU95 FP suite ...
This paper focuses on the problem of how to find and effectively exploit speculative thread-level pa...
Exploiting potential thread-level parallelism (TLP) is becoming the key factor to improving performa...
A simultaneous multithreaded (SMT) processor is able to issue and execute instructions from several ...
Abstract—We have proposed an auto-memoization processor. This processor automatically and dynamicall...
We have proposed an auto-memoization processor based on computation reuse, and merged it with specul...
This paper describes the design and evaluation of an auto-memoization processor. The major point of ...
The major specific contributions are: (1) We introduce a new compiler analysis to identify the memor...
With speculative thread-level parallelization, codes that cannot be fully compiler-analyzed are aggr...
Speculative Multi-Threading (SpMT) can improve single-threaded application performance using the mul...
With the advent of multicore processors, extracting thread level parallelism from a sequential progr...
Speculative thread-level parallelism has been recently proposed as a source of parallelism to improv...
This paper focuses on the problem of how to find and effectively exploit speculative thread-level pa...
The advent of multicores presents a promising opportunity for speeding up the execution of sequentia...
Thread-level speculative execution is a technique that makes it pos-sible for a wider range of singl...
Improving application performance is a major challenge for computer architects. Two important reason...
This paper focuses on the problem of how to find and effectively exploit speculative thread-level pa...
Exploiting potential thread-level parallelism (TLP) is becoming the key factor to improving performa...
A simultaneous multithreaded (SMT) processor is able to issue and execute instructions from several ...
Abstract—We have proposed an auto-memoization processor. This processor automatically and dynamicall...
We have proposed an auto-memoization processor based on computation reuse, and merged it with specul...
This paper describes the design and evaluation of an auto-memoization processor. The major point of ...
The major specific contributions are: (1) We introduce a new compiler analysis to identify the memor...
With speculative thread-level parallelization, codes that cannot be fully compiler-analyzed are aggr...
Speculative Multi-Threading (SpMT) can improve single-threaded application performance using the mul...
With the advent of multicore processors, extracting thread level parallelism from a sequential progr...
Speculative thread-level parallelism has been recently proposed as a source of parallelism to improv...
This paper focuses on the problem of how to find and effectively exploit speculative thread-level pa...
The advent of multicores presents a promising opportunity for speeding up the execution of sequentia...
Thread-level speculative execution is a technique that makes it pos-sible for a wider range of singl...
Improving application performance is a major challenge for computer architects. Two important reason...
This paper focuses on the problem of how to find and effectively exploit speculative thread-level pa...
Exploiting potential thread-level parallelism (TLP) is becoming the key factor to improving performa...
A simultaneous multithreaded (SMT) processor is able to issue and execute instructions from several ...