Power dissipation minimization in RF front ends

In mobile and portable wireless devices, it is important to have low power dissipation so as to maximize battery life. As the overall power dissipation of a device is dominated by the radio frequency (RF) front end rather than the digital circuit, low-power RF front end design has become a very hot topic in both research and implementation. In this paper, we propose a design method to minimize the power dissipation of a RF front end. Specifically, given the overall specifications of gain, linearity and noise figure of a front end, we derive the optimal specification for each building block of the RF front end such that the overall power dissipation is minimized. By using a specific example of a front end consisting of a couple of cascaded circuit blocks using 90nm CMOS technology, we demonstrate that significant reduction in power dissipation can be achieved using the proposed design method