A 14b 200MS/s DAC with SFDR>78dBc, IM3
- Tang, Yongjian
- Briaire, J.
- Doris, K.
- Veldhoven, van, R.H.M.
- Beek, van, P.C.W.
- Hegt, J.A.
- Roermund, van, A.H.M.
Publication date
January 2010
DOI Publisher
Institute of Electrical and Electronics Engineers Language
EnglishAbstract
A 14-bit 200MS/s current-steering DAC with a novel digital calibration technique called dynamic-mismatch mapping (DMM) is presented. Compared to traditional static-mismatch mapping and dynamic element matching, DMM reduces the nonlinearities caused by both amplitude and timing errors, without noise penalty. This 0.14µm CMOS DAC achieves a state-of-the-art performance of SFDR>78dBc, IM
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