A process is a pair 〈 A, X 〉 in which A is a set of symbols (the alphabet) and X is a non-empty prefix-closed subset of A* (the trace set). A process may be viewed as the specification of a mechanism: -symbols correspond to events that may occur. -traces correspond to sequences of events that may be observed when the mechanism is in operation.In this paper we show how for a certain class of processes circuits can be derived that behave as prescribed by these processes. The circuits are delay-insensitive in the sense that their behaviour does not depend on delays in wires and switching elements.Events may be initiated by a mechanism (active events) or by the environment of the mechanism (passive events). It is shown how active events can be ...
A process semantics for temporal logic specification is provided by relating a category of temporal ...
AbstractWe consider processes that have transitions labeled with atomic actions, and states labeled ...
This paper shows that, provided circuits contain no zero-delay loops, a tight relationship, full a...
A process is a pair 〈 A, X 〉 in which A is a set of symbols (the alphabet) and X is a non-empty pref...
. We construct a category of circuits: the objects are alphabets and the morphisms are deterministic...
A novel process algebra is presented; algebraic expressions specify delay-insensitive circuits in te...
AbstractRecent approaches to the combination of process algebras and temporal logic have shown that ...
AbstractA standard process algebra is extended by a new action σ which is meant to denote idling unt...
Preface We examine modal and temporal logics for processes. In section 1 we introduce concurrent pro...
Our topic is broadening a practical ”proofs-as-programs” method of program development to “proofs-as...
Process algebras are generally recognized as a convenient tool for describing concurrent systems at ...
An extension of process algebra is introduced which can be compared to (propositional) dynamic logic...
In the area of Natural Computing, Reaction Systems (RSs) are a qualitative abstraction inspired by t...
In this paper we sketch a general framework within which a study of networks of processes can be con...
We identify two features of common process algebra operations: their first-order flavour and the fac...
A process semantics for temporal logic specification is provided by relating a category of temporal ...
AbstractWe consider processes that have transitions labeled with atomic actions, and states labeled ...
This paper shows that, provided circuits contain no zero-delay loops, a tight relationship, full a...
A process is a pair 〈 A, X 〉 in which A is a set of symbols (the alphabet) and X is a non-empty pref...
. We construct a category of circuits: the objects are alphabets and the morphisms are deterministic...
A novel process algebra is presented; algebraic expressions specify delay-insensitive circuits in te...
AbstractRecent approaches to the combination of process algebras and temporal logic have shown that ...
AbstractA standard process algebra is extended by a new action σ which is meant to denote idling unt...
Preface We examine modal and temporal logics for processes. In section 1 we introduce concurrent pro...
Our topic is broadening a practical ”proofs-as-programs” method of program development to “proofs-as...
Process algebras are generally recognized as a convenient tool for describing concurrent systems at ...
An extension of process algebra is introduced which can be compared to (propositional) dynamic logic...
In the area of Natural Computing, Reaction Systems (RSs) are a qualitative abstraction inspired by t...
In this paper we sketch a general framework within which a study of networks of processes can be con...
We identify two features of common process algebra operations: their first-order flavour and the fac...
A process semantics for temporal logic specification is provided by relating a category of temporal ...
AbstractWe consider processes that have transitions labeled with atomic actions, and states labeled ...
This paper shows that, provided circuits contain no zero-delay loops, a tight relationship, full a...