In VLSI systems, Rent’s rule characterizes the locality of interconnect between different subsystems, and allows an efficient layout of the circuit on a chip. With rising complexities of both hardware and software, Systems-on-Chip are converging to multiprocessor architectures connected by a Network-on-Chip. Here, packets are routed instead of wires, and threads of a parallel program are distributed among processors. Still, Rent’s rule remains applicable, as it can now be used to describe the locality of network traffic. In this paper, we analyze network traffic on an on-chip network and observe the power-law relation between the size of clusters of network nodes and their external bandwidths. We then use the same techniques to study the ti...
Among the hardest problem in Networks-on-Chip (NoC) design is to customize the topological structure...
New advances in reconfigurable optical interconnect technologies will allow the fabrication of cheap...
The performance evaluation of multiprocessor interconnects cannot be divorced from issues of traffic...
In VLSI systems, Rent’s rule characterizes the locality of interconnect between different subsystems...
This thesis extends techniques from digital circuit interconnect prediction (in particular Rent’s ru...
The Kalray MPPA2-256 processor integrates 256 processing cores and 32 management cores on a chip. Th...
Computer networks provide an increasing number of services that require complex processing of packet...
Modules on a chip (such as processors and memories) are traditionally connected through a single lin...
In this paper, we present network-on-chip (NoC) design and con-trast it to traditional network desig...
Parallel computers can take many different architectural forms. One cost effective and convenient me...
The authors approach network design from the perspective of the applications and ask how much networ...
This paper examines the possibilities of providing throughput guarantees in a network-on-chip by app...
Abstract—A continuing technology scaling and the increasing requirements of modern embedded applicat...
Congestion is an important issue in networks and significantly affects network performance. Various ...
We are developing a distributed computing environment based on virtual machines featuring applicatio...
Among the hardest problem in Networks-on-Chip (NoC) design is to customize the topological structure...
New advances in reconfigurable optical interconnect technologies will allow the fabrication of cheap...
The performance evaluation of multiprocessor interconnects cannot be divorced from issues of traffic...
In VLSI systems, Rent’s rule characterizes the locality of interconnect between different subsystems...
This thesis extends techniques from digital circuit interconnect prediction (in particular Rent’s ru...
The Kalray MPPA2-256 processor integrates 256 processing cores and 32 management cores on a chip. Th...
Computer networks provide an increasing number of services that require complex processing of packet...
Modules on a chip (such as processors and memories) are traditionally connected through a single lin...
In this paper, we present network-on-chip (NoC) design and con-trast it to traditional network desig...
Parallel computers can take many different architectural forms. One cost effective and convenient me...
The authors approach network design from the perspective of the applications and ask how much networ...
This paper examines the possibilities of providing throughput guarantees in a network-on-chip by app...
Abstract—A continuing technology scaling and the increasing requirements of modern embedded applicat...
Congestion is an important issue in networks and significantly affects network performance. Various ...
We are developing a distributed computing environment based on virtual machines featuring applicatio...
Among the hardest problem in Networks-on-Chip (NoC) design is to customize the topological structure...
New advances in reconfigurable optical interconnect technologies will allow the fabrication of cheap...
The performance evaluation of multiprocessor interconnects cannot be divorced from issues of traffic...