International audienceWe introduce a virtual machine approach to pro-gram FPGAs using a high-level programming language (with automatic memory management) while hardware-accelerating a subset of it. This offers an interesting trade-off between high-level synthesis tools and pure software approaches. We describe a preliminary implementation of this hybrid approach using the OCaml language on Intel FPGAs. The associated toolset fully automatizes the compilation process from the OCaml source program to the SoPC hardware and software configuration. First results are encouraging, both for programmability and efficiency
In the past decade or so we have witnessed a steadily increasing interest in FPGAs as hardware accel...
International audienceIn this paper, we present an approach for programming microcontrollers that pr...
Current FPGA design flows do not readily support high-level, behavioural design or the use of run-ti...
International audienceWe introduce a virtual machine approach to pro-gram FPGAs using a high-level p...
International audienceThis paper aims to exploit the massive parallelism of Field-Programmable Gate ...
Field programmable gate arrays or FPGAs are the Swiss army knife of the compute accelerators. They a...
We present an overview of the evolution of programming techniques for Field-Programmable Gate Arrays...
We describe a compiler which maps programs expressed in a subset of occam into netlist descriptions ...
This thesis deals with ways to describe hardware. It presents the methods used in the synthesis of t...
Field Programmable Gate Array (FPGA) provides the ability to use, and re-use, hardware with minimal ...
form or by any means without prior written permission of the publisher. Modern Field Programmable Ga...
. This paper reports recent work on the automatic design and implementation of microprocessors to su...
This book makes powerful Field Programmable Gate Array (FPGA) and reconfigurable technology accessib...
This paper shows how to compile a program written in a subset of occam into a normal form suitable f...
The problem of automatically generating hardware modules from high level application representations...
In the past decade or so we have witnessed a steadily increasing interest in FPGAs as hardware accel...
International audienceIn this paper, we present an approach for programming microcontrollers that pr...
Current FPGA design flows do not readily support high-level, behavioural design or the use of run-ti...
International audienceWe introduce a virtual machine approach to pro-gram FPGAs using a high-level p...
International audienceThis paper aims to exploit the massive parallelism of Field-Programmable Gate ...
Field programmable gate arrays or FPGAs are the Swiss army knife of the compute accelerators. They a...
We present an overview of the evolution of programming techniques for Field-Programmable Gate Arrays...
We describe a compiler which maps programs expressed in a subset of occam into netlist descriptions ...
This thesis deals with ways to describe hardware. It presents the methods used in the synthesis of t...
Field Programmable Gate Array (FPGA) provides the ability to use, and re-use, hardware with minimal ...
form or by any means without prior written permission of the publisher. Modern Field Programmable Ga...
. This paper reports recent work on the automatic design and implementation of microprocessors to su...
This book makes powerful Field Programmable Gate Array (FPGA) and reconfigurable technology accessib...
This paper shows how to compile a program written in a subset of occam into a normal form suitable f...
The problem of automatically generating hardware modules from high level application representations...
In the past decade or so we have witnessed a steadily increasing interest in FPGAs as hardware accel...
International audienceIn this paper, we present an approach for programming microcontrollers that pr...
Current FPGA design flows do not readily support high-level, behavioural design or the use of run-ti...