Modern multi-core processors provide primitives to allow parallel programs to atomically perform selected operations. Unfortunately, the increasing number of gates in such processors leads to a higher probability of faults happening during the computation. In this paper, we perform a comparison between the robustness of such primitives with respect to faults, operating at a functional level. We focus on locks, the most widespread mechanism, and on transactional memories, one of the most promising alternatives. The results come from an extensive experimental campaign based upon simulation of the considered systems. We show that locks prove to be a more robust synchronization primitive, because their vulnerable section is smaller. On the othe...
Multithreaded programs often suffer from synchronization bugs such as atomicity violations and deadl...
A shared data structure is lock-free if its operations do not require mutual exclusion. If one proce...
As transistor budgets grow enabling chip multi-core processors, adding hardware support to ensure th...
Modern multi-core processors provide primitives to allow parallel programs to atomically perform sel...
The advent of multi-core and multi-threaded processor architectures highlights the need to address t...
Transactional memory is a promising technique for multithreaded synchronization and con-currency whi...
In todays ubiquitous multiprocessor environment parallel programming becomesan important tool to rea...
Conventional lock implementations serialize access to critical sections guarded by the same lock, pr...
Conventional lock implementations serialize access to critical sections guarded by the same lock, pr...
Transactional memory is a promising technique for multithreaded synchronization and concurrency whic...
Locks are a frequently used synchronisation mechanism in shared memory concurrent programs. They are...
Transactional memory has great potential for simplifying multithreaded programming by allowing progr...
With the introduction of multi-core CPUs, multi-threaded programming is becoming significantly more ...
A shared data structure is lock-free if its operations do not require mutual exclusion. If one proce...
A shared data structure is lock-free if its operations do not require mutual exclusion. If one proce...
Multithreaded programs often suffer from synchronization bugs such as atomicity violations and deadl...
A shared data structure is lock-free if its operations do not require mutual exclusion. If one proce...
As transistor budgets grow enabling chip multi-core processors, adding hardware support to ensure th...
Modern multi-core processors provide primitives to allow parallel programs to atomically perform sel...
The advent of multi-core and multi-threaded processor architectures highlights the need to address t...
Transactional memory is a promising technique for multithreaded synchronization and con-currency whi...
In todays ubiquitous multiprocessor environment parallel programming becomesan important tool to rea...
Conventional lock implementations serialize access to critical sections guarded by the same lock, pr...
Conventional lock implementations serialize access to critical sections guarded by the same lock, pr...
Transactional memory is a promising technique for multithreaded synchronization and concurrency whic...
Locks are a frequently used synchronisation mechanism in shared memory concurrent programs. They are...
Transactional memory has great potential for simplifying multithreaded programming by allowing progr...
With the introduction of multi-core CPUs, multi-threaded programming is becoming significantly more ...
A shared data structure is lock-free if its operations do not require mutual exclusion. If one proce...
A shared data structure is lock-free if its operations do not require mutual exclusion. If one proce...
Multithreaded programs often suffer from synchronization bugs such as atomicity violations and deadl...
A shared data structure is lock-free if its operations do not require mutual exclusion. If one proce...
As transistor budgets grow enabling chip multi-core processors, adding hardware support to ensure th...