In this paper we explore machine-learning approaches for dynamically selecting the well suited amount of concurrent threads in applications relying on Software Transactional Memory (STM). Specifically, we present a solution that dynamically shrinks or enlarges the set of input features to be exploited by the machine-learner. This allows for tuning the concurrency level while also minimizing the overhead for input-features sampling, given that the cardinality of the input-feature set is always tuned to the minimum value that still guarantees reliability of workload characterization. We also present a fully heedged implementation of our proposal within the TinySTM open source framework, and provide the results of an experimental study relying...
Software transactional memory (STM) enhances both ease-of-use and concurrency, and is considered sta...
There is tremendous diversity among the published algorithms for implementing Transactional Memory (...
Chip Multithreading (CMT) processors promise to deliver higher performance by running more than one ...
In this paper we explore machine-learning approaches for dynamically selecting the well suited amoun...
Transactional Memory (TM) stands as a powerful paradigm for manipulating shared data in concurrent a...
One of the problems of Software-Transactional-Memory (STM) systems is the performance degradation th...
In this article we exploit a combination of analytical and Machine Learning (ML) techniques in order...
Abstract-In this article we exploit a combination of analytical and Machine Learning (ML) techniques...
Synchronization transparency offered by Software Transactional Memory (STM) must not come at the exp...
Synchronization transparency offered by Software Transactional Memory (STM) must not come at the exp...
Software Transactional Memory (STM) is recognized as an effective programming paradigm for concurren...
Transactional Memory (TM) is an emerging paradigm that promises to ease the development of parallel ...
International audienceThread mapping is an appealing approach to efficiently exploit the potential o...
Abstract—Thread mapping has been extensively used as a technique to efficiently exploit memory hiera...
International audienceThread mapping has been extensively used as a technique to efficiently exploit...
Software transactional memory (STM) enhances both ease-of-use and concurrency, and is considered sta...
There is tremendous diversity among the published algorithms for implementing Transactional Memory (...
Chip Multithreading (CMT) processors promise to deliver higher performance by running more than one ...
In this paper we explore machine-learning approaches for dynamically selecting the well suited amoun...
Transactional Memory (TM) stands as a powerful paradigm for manipulating shared data in concurrent a...
One of the problems of Software-Transactional-Memory (STM) systems is the performance degradation th...
In this article we exploit a combination of analytical and Machine Learning (ML) techniques in order...
Abstract-In this article we exploit a combination of analytical and Machine Learning (ML) techniques...
Synchronization transparency offered by Software Transactional Memory (STM) must not come at the exp...
Synchronization transparency offered by Software Transactional Memory (STM) must not come at the exp...
Software Transactional Memory (STM) is recognized as an effective programming paradigm for concurren...
Transactional Memory (TM) is an emerging paradigm that promises to ease the development of parallel ...
International audienceThread mapping is an appealing approach to efficiently exploit the potential o...
Abstract—Thread mapping has been extensively used as a technique to efficiently exploit memory hiera...
International audienceThread mapping has been extensively used as a technique to efficiently exploit...
Software transactional memory (STM) enhances both ease-of-use and concurrency, and is considered sta...
There is tremendous diversity among the published algorithms for implementing Transactional Memory (...
Chip Multithreading (CMT) processors promise to deliver higher performance by running more than one ...