Stochastic-Based Convolutional Networks With Reconfigurable Logic Fabric

Convolutional neural network (CNN), well-knownto be computationally intensive, is a fundamental algorithmicbuilding block in many computer vision and artificial intelligenceapplications that follow the deep learning principle. This workpresents a novel stochastic-based and scalable hardware architectureand circuit design that computes a convolutional neuralnetwork with FPGA. The key idea is to implement a multidimensionalconvolution accelerator that leverages the widelyusedconvolution theorem. Our approach has three advantages. First, it can achieve significantly lower algorithmic complexityfor any given accuracy requirement. This computing complexity, when compared with that of conventional multiplier-based andFFT-based architectures, represents a significant performanceimprovement. Second, this proposed stochastic-based architectureis highly fault-tolerant because the information to be processed isencoded with a large ensemble of random samples. As such, thelocal perturbations of its computing accuracy will be dissipatedglobally, thus becoming inconsequential to the final overall results. Overall, being highly scalable and energy efficient, our stochasticbasedconvolutional neural network architecture is well-suited fora modular vision engine with the goal of performing real-timedetection, recognition and segmentation of mega-pixel images, especially those perception-based computing tasks that are inherentlyfault-tolerant. We also present a performance comparisonbetween FPGA implementations that use deterministic-based andStochastic-based architectures