Implementation of the signature scheme Rainbow on SoC FPGA

Thanks to the research progress, quantum computers are slowly becoming a reality, and some companies already have working prototypes. While this is great news for some, it also means that part of the encryption used today will be rendered unsafe and obsolete. Due to this fact, NIST (US National Institute of Standards and Technology) has been running a standardisation process for quantum-resistant key exchange algorithms and digital signatures. One of these is Rainbow - a signature scheme based on the fact that solving a set of random multivariate quadratic equations is an NP-hard problem. This thesis aims to develop an AXI connected accelerator for the Rainbow signature scheme, specifically the Ia variant. The accelerator is highly parameterisable, so one can choose the data bus width, directly affecting the FPGA area used. It is also possible to swap components to use the design for other variants of Rainbow. Thanks to that, multiple tests can be performed. The developed accelerator provides significant speedup compared to CPU-based computation. This thesis includes detailed documentation of the design as well as performance and resource utilisation tests