International audienceFor security issues in portable applications such as smart card, various proposed techniques can be applied to harden the ALU against fault attacks. Among others, time redundancy is a good candidate to offer a low hardware cost. The main disadvantage of this scheme is high extra time due to the recomputation. However, this impact can be considerably reduced by exploiting idle hardware in the ALU. In this paper, we will show that applying this scheme in a simple processor-based smart card can reduce down to 30%-20% of extra time and requires a reasonable hardware overhead about 20.4%
IC technologies are approaching the ultimate limits of silicon in terms of channel width, power supp...
Semiconductor is one of the most reliable inventions when engineered and used with longevity in mind...
Dynamically reconfigurable systems are known to have many advantages such as area and power reductio...
International audienceFor security issues in portable applications such as smart card, various propo...
Abstract—Modern security-aware embedded systems need pro-tection against fault attacks. These attack...
Miniaturization, cost, functionality, complexity and power dissipation are important and necessary d...
Abstract: Soft error is a temporal malfunction, which does not leave any permanent damages in the ...
International audienceTiming side-channels are an identified threat for security critical software. ...
This paper describes a single-version algorithmic approach to design in fault tolerant computing in ...
In this dissertation we address the overhead reduction of fault tolerance (FT) techniques. Due to te...
This paper speculates that technology trends pose new challenges for fault tolerance in microprocess...
Timing side-channels are an identified threat for security critical software. Existing countermeasur...
Scaling of transistor's channel length is entering the realm of atomic and molecular geometries maki...
International audienceIn this paper, we propose a new approach to implement a reliable softcore proc...
We present a fault tolerant Arithmetic and Logic Unit (ALU) for medical systems. Real-time medical s...
IC technologies are approaching the ultimate limits of silicon in terms of channel width, power supp...
Semiconductor is one of the most reliable inventions when engineered and used with longevity in mind...
Dynamically reconfigurable systems are known to have many advantages such as area and power reductio...
International audienceFor security issues in portable applications such as smart card, various propo...
Abstract—Modern security-aware embedded systems need pro-tection against fault attacks. These attack...
Miniaturization, cost, functionality, complexity and power dissipation are important and necessary d...
Abstract: Soft error is a temporal malfunction, which does not leave any permanent damages in the ...
International audienceTiming side-channels are an identified threat for security critical software. ...
This paper describes a single-version algorithmic approach to design in fault tolerant computing in ...
In this dissertation we address the overhead reduction of fault tolerance (FT) techniques. Due to te...
This paper speculates that technology trends pose new challenges for fault tolerance in microprocess...
Timing side-channels are an identified threat for security critical software. Existing countermeasur...
Scaling of transistor's channel length is entering the realm of atomic and molecular geometries maki...
International audienceIn this paper, we propose a new approach to implement a reliable softcore proc...
We present a fault tolerant Arithmetic and Logic Unit (ALU) for medical systems. Real-time medical s...
IC technologies are approaching the ultimate limits of silicon in terms of channel width, power supp...
Semiconductor is one of the most reliable inventions when engineered and used with longevity in mind...
Dynamically reconfigurable systems are known to have many advantages such as area and power reductio...