We present a fault tolerant Arithmetic and Logic Unit (ALU) for medical systems. Real-time medical systems possess stringent requirements for fault tolerance because faulty hardware could jeopardize human life. For such systems, checkers are employed so that incorrect data never leaves the faulty module and recovery time from faults is minimal. We have investigated information, hardware and time redundancy. After analyzing the hardware, the delay and the power overheads we have decided to use time redundancy as our fault tolerance method for the ALU. The original contribution of this thesis is to provide single stuck-fault error correction in an ALU using recomputing with swapped operands (RESWO). Here, we divide the 32-bit data path into 3...
This paper proposes a unique method of an error detection and correction (EDAC) circuit, carried out...
This paper speculates that technology trends pose new challenges for fault tolerance in microprocess...
Failures of nano-metric technologies owing to defects and shrinking process tolerances give rise to ...
Abstract—Modern security-aware embedded systems need pro-tection against fault attacks. These attack...
Miniaturization, cost, functionality, complexity and power dissipation are important and necessary d...
This thesis examines three specific issues of defect-tolerant VLSI: (1) design and reconfiguration o...
We develop a microprocessor design that tolerates hard faults, including fabrication defects and in-...
AbstractThis paper describes research carried out using a quadded logic cell (QLC) structure with th...
System reliability is becoming a significant concern as technology continues to shrink. This is beca...
Shrinking of the device feature size allows high complexity systems to be designed and integrated wi...
The ever-shrinking technology features have as a direct consequence the increase of defect density i...
Scaling of transistor's channel length is entering the realm of atomic and molecular geometries maki...
Errors introduced by radiation-induced single event upset and single event latchup in very deep subm...
© 2014 Technical University of Munich (TUM).While allowing for the fabrication of increasingly compl...
[[abstract]]A fault-tolerant array multiplier design with 33% utilization is proposed by applying ti...
This paper proposes a unique method of an error detection and correction (EDAC) circuit, carried out...
This paper speculates that technology trends pose new challenges for fault tolerance in microprocess...
Failures of nano-metric technologies owing to defects and shrinking process tolerances give rise to ...
Abstract—Modern security-aware embedded systems need pro-tection against fault attacks. These attack...
Miniaturization, cost, functionality, complexity and power dissipation are important and necessary d...
This thesis examines three specific issues of defect-tolerant VLSI: (1) design and reconfiguration o...
We develop a microprocessor design that tolerates hard faults, including fabrication defects and in-...
AbstractThis paper describes research carried out using a quadded logic cell (QLC) structure with th...
System reliability is becoming a significant concern as technology continues to shrink. This is beca...
Shrinking of the device feature size allows high complexity systems to be designed and integrated wi...
The ever-shrinking technology features have as a direct consequence the increase of defect density i...
Scaling of transistor's channel length is entering the realm of atomic and molecular geometries maki...
Errors introduced by radiation-induced single event upset and single event latchup in very deep subm...
© 2014 Technical University of Munich (TUM).While allowing for the fabrication of increasingly compl...
[[abstract]]A fault-tolerant array multiplier design with 33% utilization is proposed by applying ti...
This paper proposes a unique method of an error detection and correction (EDAC) circuit, carried out...
This paper speculates that technology trends pose new challenges for fault tolerance in microprocess...
Failures of nano-metric technologies owing to defects and shrinking process tolerances give rise to ...