A coherent sampling based method for estimating the jitter used as entropy source for True Random Number Generators

International audienceThe paper presents a method, which can be employed to measure the timing jitter present in periodic clock signals that are used as entropy source in True Random Number Generators (TRNG) aimed at cryptographic applications in reconfigurable hardware (FPGA). The method uses the principle of a coherent sampling and can be easily implemented inside the chip in order to test online the jitter source. The method was carefully validated in various simulations that have shown that the measured jitter size corresponds perfectly to that of the jitter injected to the model. While the primary aim of the proposed measuring technique was the evaluation of the quality of jitter as an entropy source in True Random Number Generators (TRNG), we believe that the same principle can be used in order to characterize the jitter in fast communication links as well