Many multicast ATM switch architectures have been proposed which differ greatly in the method in which replication of cells is handled. Depending on the switch architecture, the processing overhead incurred due to the cell copy function may be non-negligible. We develop a queueing model for a multicast switching node which accounts for this overhead. In the model, the source sends some number of duplicate cells, each of which is replicated at the switch to yield the total number of required copies. We use constrained optimization to determine the optimal amount of source duplication which minimizes the mean response time of the system. It is found that higher source duplication is favored when the copy function overhead is comparable to the...
In this paper, a new multicast switch structure (called CCRMS) is proposed that can achieve high thr...
We evaluate the performance of an N × N ATM discrete time multicast switch model with input queueing...
[[abstract]]A baseline switch architecture with several independent network planes has been proposed...
Space-based multicast switches use copy networks to generate the copies requested by the input packe...
[[abstract]]A novel multicast switch architecture with high throughput performance and low hardware ...
[[abstract]]A novel multicast switch architecture with high throughput performance and low hardware ...
The majority of ATM switches that have been proposed only support unicast (point-to-point) connectio...
A recursive multistage structure for multicast asynchronous transfer mode (ATM) switching is propose...
[[abstract]]A multicast cell scheduling algorithm with input queue is proposed in ATM multicast swit...
Abstract—It is known that single-stage IQ based switch can provide 100 % throughput guarantee for an...
[[abstract]]We propose an efficient multicast cell-scheduling algorithm, called multiple-slot cell-s...
[[abstract]]We propose an efficient multicast cell-scheduling algorithm, called multiple-slot cell-s...
Multicast virtual circuit cell switches can be constructed with near optimal hardware complexity by ...
[[abstract]]We propose an efficient multicast cell-scheduling algorithm, called multiple-slot cell-s...
The paper studies input-queued packet switches loaded with both unicast and multicast traffic. The p...
In this paper, a new multicast switch structure (called CCRMS) is proposed that can achieve high thr...
We evaluate the performance of an N × N ATM discrete time multicast switch model with input queueing...
[[abstract]]A baseline switch architecture with several independent network planes has been proposed...
Space-based multicast switches use copy networks to generate the copies requested by the input packe...
[[abstract]]A novel multicast switch architecture with high throughput performance and low hardware ...
[[abstract]]A novel multicast switch architecture with high throughput performance and low hardware ...
The majority of ATM switches that have been proposed only support unicast (point-to-point) connectio...
A recursive multistage structure for multicast asynchronous transfer mode (ATM) switching is propose...
[[abstract]]A multicast cell scheduling algorithm with input queue is proposed in ATM multicast swit...
Abstract—It is known that single-stage IQ based switch can provide 100 % throughput guarantee for an...
[[abstract]]We propose an efficient multicast cell-scheduling algorithm, called multiple-slot cell-s...
[[abstract]]We propose an efficient multicast cell-scheduling algorithm, called multiple-slot cell-s...
Multicast virtual circuit cell switches can be constructed with near optimal hardware complexity by ...
[[abstract]]We propose an efficient multicast cell-scheduling algorithm, called multiple-slot cell-s...
The paper studies input-queued packet switches loaded with both unicast and multicast traffic. The p...
In this paper, a new multicast switch structure (called CCRMS) is proposed that can achieve high thr...
We evaluate the performance of an N × N ATM discrete time multicast switch model with input queueing...
[[abstract]]A baseline switch architecture with several independent network planes has been proposed...