Add to ORKGInternational audienceThe paper explores hardware supports for replaying instructions to protect processors against some fault injection attacks. A replay instruction is added to the instruction set of a small 32-bit RISC processor to allow the automatic and parametrized replay of sequences of instructions. Various detection elements are added to the processor, implemented on FPGA, and compared in terms of performances, cost and fault coverage. The proposed extension leads to significant improvements compared to software protections for a small silicon overhead
In this contribution, we present an FPGA-based simulation environment for fault attacks on cryptogra...
With more computing platforms connected to the Internet each day, computer system security has becom...
The thesis deals with attacks that cause faults in CPU and MCU calculations. A short voltage change ...
International audienceThe paper explores hardware supports for replaying instructions to protect pro...
Embedded processors can be subject to physical attacks due to some proximity between an attacker and...
Les processeurs embarqués peuvent faire l’objet d’attaques physiques en raison de la proximité entre...
Soft errors in embedded systems' memories like single-event upsets and multiple-bit upsets lead to d...
16 pages. Please contact the authors to get the pre-proceedings version.International audienceFault ...
International audienceInjection of transient faults can be used as a way to attack embedded systems....
Fault tolerant software against fault attacks constitutes an important class of countermeasures for ...
Security and reliability in processor based systems are concerns requiring adroit solutions. Securit...
As technology scales, transient faults due single event tran-sient have emerged as a important chall...
A Fault Attack (FA) is performed mainly under the data corruption model and poses a threat to securi...
Short version of the article "Experimental evaluation of two software countermeasures against fault ...
With more computing platforms connected to the Internet each day, computer system security has becom...
In this contribution, we present an FPGA-based simulation environment for fault attacks on cryptogra...
With more computing platforms connected to the Internet each day, computer system security has becom...
The thesis deals with attacks that cause faults in CPU and MCU calculations. A short voltage change ...
International audienceThe paper explores hardware supports for replaying instructions to protect pro...
Embedded processors can be subject to physical attacks due to some proximity between an attacker and...
Les processeurs embarqués peuvent faire l’objet d’attaques physiques en raison de la proximité entre...
Soft errors in embedded systems' memories like single-event upsets and multiple-bit upsets lead to d...
16 pages. Please contact the authors to get the pre-proceedings version.International audienceFault ...
International audienceInjection of transient faults can be used as a way to attack embedded systems....
Fault tolerant software against fault attacks constitutes an important class of countermeasures for ...
Security and reliability in processor based systems are concerns requiring adroit solutions. Securit...
As technology scales, transient faults due single event tran-sient have emerged as a important chall...
A Fault Attack (FA) is performed mainly under the data corruption model and poses a threat to securi...
Short version of the article "Experimental evaluation of two software countermeasures against fault ...
With more computing platforms connected to the Internet each day, computer system security has becom...
In this contribution, we present an FPGA-based simulation environment for fault attacks on cryptogra...
With more computing platforms connected to the Internet each day, computer system security has becom...
The thesis deals with attacks that cause faults in CPU and MCU calculations. A short voltage change ...