Directories used for cache coherence are vulnerable to side channel attacks. Directories are inclusive by nature, even if caches are non-inclusive because directories need to track all cache lines in the system. Attackers can leverage this inclusivity to evict victim directory entries and trigger the eviction of victim cache lines from private caches. Thus, there is a need to redesign directories with security in mind. To prevent attackers’ ability to evict victim entries, we need to block interference between processes. One of the most common approaches employed in caches is to partition among different processes to provide isolation. However, partitioning efficiently is a major challenge especially with an increasing number of cores witho...
Software side channel attacks have become a serious concern with the recent rash of attacks on specu...
Cloud providers are increasingly exposed to malicious actors through transient attacks, such as Spec...
Recent CPUs have begun to adopt non-inclusive cache hierarchies for more effective cache utilization...
Security and trustworthiness are key considerations in designing modern processor hardware. It has b...
Contemporary computing employs cache hierarchy to fill the speed gap between processors and main mem...
Over the last years, timing channels that exploit resources shared at the microarchitectural level h...
Software cache-based side channel attacks are a serious new class of threats for computers. Unlike p...
Software cache-based side channel attacks present serious threats to modern computer systems. Using ...
Software cache-based side channel attacks present serious threats to modern computer systems. Using ...
Multi-processor systems are becoming the de-facto standard across different computing domains, rangi...
Growing core counts have highlighted the need for scalable on-chip coherence mechanisms. The increas...
Software cache-based side channel attacks present a serious threat to computer systems. Previously p...
Cache attacks have increasingly gained momentum in the security community. In such attacks, attacker...
Abstract—In this paper we show a small but fast popularity-based front-end cache can provide provabl...
Recent research has produced a number of viable side-channel attack methods based on the data-depend...
Software side channel attacks have become a serious concern with the recent rash of attacks on specu...
Cloud providers are increasingly exposed to malicious actors through transient attacks, such as Spec...
Recent CPUs have begun to adopt non-inclusive cache hierarchies for more effective cache utilization...
Security and trustworthiness are key considerations in designing modern processor hardware. It has b...
Contemporary computing employs cache hierarchy to fill the speed gap between processors and main mem...
Over the last years, timing channels that exploit resources shared at the microarchitectural level h...
Software cache-based side channel attacks are a serious new class of threats for computers. Unlike p...
Software cache-based side channel attacks present serious threats to modern computer systems. Using ...
Software cache-based side channel attacks present serious threats to modern computer systems. Using ...
Multi-processor systems are becoming the de-facto standard across different computing domains, rangi...
Growing core counts have highlighted the need for scalable on-chip coherence mechanisms. The increas...
Software cache-based side channel attacks present a serious threat to computer systems. Previously p...
Cache attacks have increasingly gained momentum in the security community. In such attacks, attacker...
Abstract—In this paper we show a small but fast popularity-based front-end cache can provide provabl...
Recent research has produced a number of viable side-channel attack methods based on the data-depend...
Software side channel attacks have become a serious concern with the recent rash of attacks on specu...
Cloud providers are increasingly exposed to malicious actors through transient attacks, such as Spec...
Recent CPUs have begun to adopt non-inclusive cache hierarchies for more effective cache utilization...