Hardware-software implementation of a McEliece cryptosystem for post-quantum cryptography

This paper shows the implementation on FPGA of a McEliece cryptosystem, which ensures the security recommendations given by the European Telecommunications Standards Institute (ETSI) for next generation of quantum-resistant cryptosystems. The proposed implementation provides more than 128 bits of quantum security using a public key of 2,097,152 bytes. The proposed system is based on a hardware/software implementation that uses an ARM Cortex-A53 core connected to a coprocessor through an AX14 lite interface. The complete system was implemented on a Xilinx Zynq UltraScale+ and it is able to decipher texts of 8192 bit-length is 47.39 ms.This work was supported by the Ministerio de Economía y Competitividad in the framework of the Programa Estatal de Investigación, Desarrollo e Innovación Orientada a los Retos de la Sociedad, project TEC2015-68784-R.Peer ReviewedPostprint (author's final draft