Network-on-Chip (NoC) is used as the communication network in many applications that use multiple cores or Processing Elements (PEs). Routers play a crucial role as connectors since a faulty router can degrade the NoC’s performance and cause miscommunication between the network’s components. Thus a faulty router may cause the system to fail. To avoid failure in routers in NoCs, a novel self-healing technique is proposed. Self-healing serves to recover hardware faults, and it is defined as the ability of a system to recover from its faults without any external intervention. The proposed self-healing method is to heal faulty routers and their port buffers of faults as they occur. The proposed method uses the neighboring routers ...
AbstractDeflection routing is a promising approach for energy and hardware efficient NoCs. Future VL...
Network-on-Chip (NoC) router is an entity that facilitates communication between subsystem or IP cor...
Network on chip (NoC) is a design space covered by the manifold combinations of network topology opt...
Deep submicron technologies continue to develop according to Moore’s law allowing hundreds of proces...
AbstractNetwork-on-Chip has become a hot spot in the field of complex System-on-Chip for its effecti...
Abstract Network-on-Chip (NoC) with excellent scalability and high bandwidth has been considered to ...
Network-on-Chip (NoC) is a key component in chip multiprocessors (CMPs) as it supports communication...
In this work, we propose a fault-tolerant framework for Network on Chips (NoC) to achieve maximum pe...
Network-on-Chip (NoC) is widely used as a communication scheme in modern many-core systems. To guara...
The aggressive semiconductor technology scaling provides the means for doubling the amount of transi...
The aggressive semiconductor technology scaling provides the means for doubling the amount of transi...
The growing complexity of Multiprocessor Systems on Chips (MPSoCs) is requiring communication resour...
As the feature size scales down to deep nanometer regimes, it has enabled the designers to fabricate...
As silicon continues to scale, transistor reliability is becoming a major concern. At the same time,...
Abstract — Very large scale integrated circuits typically employ Network-on-Chip (NoC) as the backbo...
AbstractDeflection routing is a promising approach for energy and hardware efficient NoCs. Future VL...
Network-on-Chip (NoC) router is an entity that facilitates communication between subsystem or IP cor...
Network on chip (NoC) is a design space covered by the manifold combinations of network topology opt...
Deep submicron technologies continue to develop according to Moore’s law allowing hundreds of proces...
AbstractNetwork-on-Chip has become a hot spot in the field of complex System-on-Chip for its effecti...
Abstract Network-on-Chip (NoC) with excellent scalability and high bandwidth has been considered to ...
Network-on-Chip (NoC) is a key component in chip multiprocessors (CMPs) as it supports communication...
In this work, we propose a fault-tolerant framework for Network on Chips (NoC) to achieve maximum pe...
Network-on-Chip (NoC) is widely used as a communication scheme in modern many-core systems. To guara...
The aggressive semiconductor technology scaling provides the means for doubling the amount of transi...
The aggressive semiconductor technology scaling provides the means for doubling the amount of transi...
The growing complexity of Multiprocessor Systems on Chips (MPSoCs) is requiring communication resour...
As the feature size scales down to deep nanometer regimes, it has enabled the designers to fabricate...
As silicon continues to scale, transistor reliability is becoming a major concern. At the same time,...
Abstract — Very large scale integrated circuits typically employ Network-on-Chip (NoC) as the backbo...
AbstractDeflection routing is a promising approach for energy and hardware efficient NoCs. Future VL...
Network-on-Chip (NoC) router is an entity that facilitates communication between subsystem or IP cor...
Network on chip (NoC) is a design space covered by the manifold combinations of network topology opt...