Instruction Scheduler of C Compiler for VLIW Architecture

This bachelor thesis discusses about VLIW processor architecture and about the part of the compiler which is designed for instruction scheduling. It describes LLVM compiling platform, especially those parts which are important to create new schedulling pass for VLIW architecture. Creation schedulling pass is also a result of this work. Futhermore, test results of newly Scheduling pass are described. Test was conducted on VEX architecture