This thesis describes the development of an LLVM-based compiler for the ?-VEX processor. The ?-VEX processor is a runtime re- configurable VLIW processor. Currently, two compilers exist that target the ?-VEX processor: a HP-VEX compiler and a GCC-based compiler. We show that both compilers have disadvantages that are very dif- ficult to fix. Therefore we have built an LLVM-based compiler that targets the ?-VEX processor. The LLVM-based compiler can be pa- rameterized in a way similar to the HP-VEX compiler. Furthermore, we will present certain optimizations that are new for LLVM-based compilers. These optimizations include a custom machine scheduler that avoids structural and data hazards in the generated binaries. Finally, we demonstrate t...
Very Long Instruction Word (VLIW) application specific processors represent an attractive solution f...
International audienceModern compilers integrate recent advances in compiler construction, intermedi...
The ρ-VEX is a dynamically reconfigurable VLIW processor, developed at TU Delft, which is capable of...
The low-level virtual machine (LLVM) compiler infrastructure is a mature and stable framework to imp...
Increasingly more computing power is being demanded in the domain of multimedia applications. Comput...
This bachelor thesis discusses about VLIW processor architecture and about the part of the compiler ...
Massively parallel architectures are gaining momentum thanks to the opportunities for both high perf...
The ?-VEX is a run-time reconfigurable Very Long Instruction Word (VLIW) processor. This unique proc...
High demand for computational power over the last decades has led to the widespread presence of proc...
Provides reusable components for building compilers Reduce the time/cost to build a new compiler Bui...
This master's thesis describes the design and implementation of a new backend for the Timber compile...
Applications run on embedded DSPs become increasingly complex, while the demands on speed and power ...
This document introduces the LLVM compiler infrastructure and instruction set, a simple approach tha...
This thesis describes the design and implementation of a prototype LLVM compiler backend, x86-64p, t...
This bachelor's thesis deals with general questions of compilers, describes the Low-Level Virtual Ma...
Very Long Instruction Word (VLIW) application specific processors represent an attractive solution f...
International audienceModern compilers integrate recent advances in compiler construction, intermedi...
The ρ-VEX is a dynamically reconfigurable VLIW processor, developed at TU Delft, which is capable of...
The low-level virtual machine (LLVM) compiler infrastructure is a mature and stable framework to imp...
Increasingly more computing power is being demanded in the domain of multimedia applications. Comput...
This bachelor thesis discusses about VLIW processor architecture and about the part of the compiler ...
Massively parallel architectures are gaining momentum thanks to the opportunities for both high perf...
The ?-VEX is a run-time reconfigurable Very Long Instruction Word (VLIW) processor. This unique proc...
High demand for computational power over the last decades has led to the widespread presence of proc...
Provides reusable components for building compilers Reduce the time/cost to build a new compiler Bui...
This master's thesis describes the design and implementation of a new backend for the Timber compile...
Applications run on embedded DSPs become increasingly complex, while the demands on speed and power ...
This document introduces the LLVM compiler infrastructure and instruction set, a simple approach tha...
This thesis describes the design and implementation of a prototype LLVM compiler backend, x86-64p, t...
This bachelor's thesis deals with general questions of compilers, describes the Low-Level Virtual Ma...
Very Long Instruction Word (VLIW) application specific processors represent an attractive solution f...
International audienceModern compilers integrate recent advances in compiler construction, intermedi...
The ρ-VEX is a dynamically reconfigurable VLIW processor, developed at TU Delft, which is capable of...