The TDCpix readout ASIC: A 75ps resolution timing front-end for the NA62 Gigatracker hybrid pixel detector

The TDCpix is a novel pixel readout ASIC for the NA62 Gigatracker detector. NA62 is a new experiment being installed at the CERN Super Proton Synchrotron. Its Gigatracker detector shall provide on-beam tracking and time stamping of individual particles with a time resolution of 150 ps rms. It will consist of three tracking stations, each with one hybrid pixel sensor. The peak fl ow of particles crossing the detector modules reaches 1.27 MHz/mm 2 for a total rate of about 0.75 GHz. Ten TDCpix chips will be bump-bonded to every silicon pixel sensor. Each chip shall perform time stamping of 100 M particle hits per second with a detection ef fi ciency above 99% and a timing accuracy better than 200 ps rms for an overall three-station-setup time resolution of better than 150 ps. The TDCpix chip has been designed in a 130 nm CMOS technology. It will feature 45 40 square pixels of 300 300 μ m 2 and a complex End of Column peripheral region including an array of TDCs based on DLLs, four high speed serializers, a low- jitter PLL, readout and control circuits. This contribution will describe the complete design of the fi nal TDCpix ASIC. It will discuss design choices, the challenges faced and some of the lessons learned. Furthermore, experimental results from the testing of circuit prototypes will be presented. These demonstrate the achievement of key performance fi gures such as a time resolution of the processing chain of 75 ps rms with a laser sent to the center of the pixel and the capability of time stamping charged particles with an overall resolution below 200 ps rm