The design and implementation of a multitasking run-time system on a tightly coupled FPGA-CPU platform is presented. Using a mix of CPU and FPGA programmable logic for computing, user applications are executed as mixed-architecture processes from the perspective of the OS. Context switching mechanisms with hybrid scheduling containing both blocking and preemption support were implemented to support concurrent execution of multiple mixed-architecture processes, and evaluated under a synthetic workload.published_or_final_versio
Today’s embedded systems depend on the availability of hybrid platforms, that contain heterogeneous ...
Reconfigurable processor hybrids are becoming an accepted solution in the embedded systems domain, b...
Μεταπτυχιακή Διατριβή που υποβλήθηκε στην σχολή ΗΜΜΥ του Πολυτεχνείου Κρήτης για την πλήρωση προϋποθ...
The design and implementation of a multitasking runtime system for mixed-architecture applications o...
Heterogeneous chips that combine CPUs and FPGAs can distribute processing so that the algorithm task...
The sharp increase in demand for performance has prompted an explosion in the complexity of modern m...
A hardware scheduler is developed to improve real-time performance of soft-core processor based comp...
In this paper we present a novel scheduling technique for partially-reconfigurable FPGA-based system...
FPGA technology is becoming a vital alternative to CPU-based processing as the performance of CPU te...
Summarization: Partial reconfiguration (PR) of FPGAs can be used to dynamically extend and adapt the...
Summarization: Partial reconfiguration (PR) of FPGAs can be used to dynamically extend and adapt the...
Many embedded real-time applications are typically time-triggered and preemptive schedulers are used...
Motivated by the increasing computational demands of application workloads in the field of cyber-phy...
Reconfigurable computing has become an important part of research in software systems and computer a...
Abstract—The purpose of this paper is to describe an predictable CPU architecture, based on the five...
Today’s embedded systems depend on the availability of hybrid platforms, that contain heterogeneous ...
Reconfigurable processor hybrids are becoming an accepted solution in the embedded systems domain, b...
Μεταπτυχιακή Διατριβή που υποβλήθηκε στην σχολή ΗΜΜΥ του Πολυτεχνείου Κρήτης για την πλήρωση προϋποθ...
The design and implementation of a multitasking runtime system for mixed-architecture applications o...
Heterogeneous chips that combine CPUs and FPGAs can distribute processing so that the algorithm task...
The sharp increase in demand for performance has prompted an explosion in the complexity of modern m...
A hardware scheduler is developed to improve real-time performance of soft-core processor based comp...
In this paper we present a novel scheduling technique for partially-reconfigurable FPGA-based system...
FPGA technology is becoming a vital alternative to CPU-based processing as the performance of CPU te...
Summarization: Partial reconfiguration (PR) of FPGAs can be used to dynamically extend and adapt the...
Summarization: Partial reconfiguration (PR) of FPGAs can be used to dynamically extend and adapt the...
Many embedded real-time applications are typically time-triggered and preemptive schedulers are used...
Motivated by the increasing computational demands of application workloads in the field of cyber-phy...
Reconfigurable computing has become an important part of research in software systems and computer a...
Abstract—The purpose of this paper is to describe an predictable CPU architecture, based on the five...
Today’s embedded systems depend on the availability of hybrid platforms, that contain heterogeneous ...
Reconfigurable processor hybrids are becoming an accepted solution in the embedded systems domain, b...
Μεταπτυχιακή Διατριβή που υποβλήθηκε στην σχολή ΗΜΜΥ του Πολυτεχνείου Κρήτης για την πλήρωση προϋποθ...