An effective cross-talk isolation structure for power IC applications

Power Integrated Circuits (PICs), which combine one or more power devices with logic and control circuit on the same chip, have received increasing attention for a variety of consumer and industrial applications in recent years. Many new emerging integrable devices and fabrication technologies with high voltage and/or high current handling capabilities were reports. However, cross-talk between power devices as well as interaction between power device and low voltage circuit are still problems for realization of PICs using these technologies. Attempts on solving the isolation problem have been published previously. Solutions such as using high resistivity substrate, adding a series gate resistance to the gate device circuitry, and using a floating well design were found useful for alleviating the problem to some degree. However, no efficient and effective solution to the problem has been reported so far in the literature. In this thesis, a simple and effective cross-talk isolation structure for PIC applications is reported. The structure consists of an isolator and a collector, and is placed in the epitaxial layer between the power device and the CMOS structure. Two-dimensional numerical simulation and experimental implementation of the isolation structure are carried out to verify its effectiveness. Results show that, with the isolation structure incorporated, operating current of the body diode of the LDMOST can be improved by 16 times before CMOS latch-up occurs in the control circuit. In LIGBT and CMOS isolation, maximum operating current of the LIGBT is improved by 5 times. For dynamic interaction between integrated LIGBTs, 8 times reduction in current surge in the adjacent device during turn-off transient is observed