The design of a high performance dataflow processor for multiprocessor systems.

The objective of this work is to design a high performance dynamic dataflow processor for multiprocessor systems. The performance of contemporary dataflow processors is limited due to the presence of a component, called a matching unit. The function of this unit is to match instruction tokens in order to detect the executability of instructions. Since activities within the matching unit are sequential in nature and require multiple memory accesses, the unit has been identified as a major performance bottleneck in a prototype processor. We propose a natural way to partition the set of tokens and present a new implementation for the matching unit, called an Instance-Based Matching Unit. The new unit requires tokens to be partitioned into blocks and allows matching of these blocks of tokens to proceed concurrently. With the new matching unit, substantial throughput enhancement for the unit is reported. We then analyze the throughputs at various stages of a conventional dataflow processor. The results thus obtained direct us to propose an optimum configuration for an effective sub-processor. The maximum throughput of this sub-processor is determined by the throughput of a queue. With the sub-processor as a building block, a high performance dataflow processor is presented which consists of multiple copies of the sub-processor. Characteristics of the processor are studied with the Livermore Fortran Kernels as inputs. The performance of this processor is high, and the performance increases with the number of Sub-Processors.PhDComputer scienceUniversity of Michiganhttp://deepblue.lib.umich.edu/bitstream/2027.42/162222/1/8920580.pd