There are three major classes of MIMD multiprocessors: cache-coherent machines, NUMA (non-uniform memory reference) machines without cache coherence, and distributed-memory multicomputers. All three classes can be used to run shared-memory applications, though the third requires software support in order to do so, and the second requires software support in order to do so well. We use trace-driven simulation to compare the performance of these classes, in an attempt to determine the effect of various architectural features and parameters on overall program performance. For those systems whose hardware or software supports both coherent caching (migration, replication) and remote reference, we use optimal off-line analysis to make the correc...
Cache Coherent Non-Uniform Memory Access (CC-NUMA) architectures have received strong interests from...
In a shared-memory multiprocessor with private caches, cached copies of a data item must be kept con...
In recent years, much effort has been devoted to analyzing the performance of distributed memory sys...
Two interesting variations of large-scale shared-memory ma-chines that have recently emerged are cac...
Multiprocessor memory reference traces provide a wealth of information on the behavior of parallel p...
A major concern with high-performance general-purpose work-stations is to speed up the execution of ...
A wide variety of computer architectures have been proposed to exploit parallelism at different gran...
All methods of multi-processing need some form of processor to processor communication. In shared me...
Shared memory provides an attractive and intuitive programming model that makes good use of programm...
[[abstract]]©1998 JISE-A multithreaded computer maintains multiple program counters and register fil...
Cache coherence is one of the main challenges to tackle when designing a shared-memory multiprocesso...
In this research we built a SystemC Level-1 data cache system in a distributed shared memory archite...
We argue that OS-provided data coherence on non-cache-coherent NUMA multiprocessors (machines with a...
We compare the performance of three major programming models— a load-store cache-coherent shared add...
200 p.Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 1993.The use of a private cache in...
Cache Coherent Non-Uniform Memory Access (CC-NUMA) architectures have received strong interests from...
In a shared-memory multiprocessor with private caches, cached copies of a data item must be kept con...
In recent years, much effort has been devoted to analyzing the performance of distributed memory sys...
Two interesting variations of large-scale shared-memory ma-chines that have recently emerged are cac...
Multiprocessor memory reference traces provide a wealth of information on the behavior of parallel p...
A major concern with high-performance general-purpose work-stations is to speed up the execution of ...
A wide variety of computer architectures have been proposed to exploit parallelism at different gran...
All methods of multi-processing need some form of processor to processor communication. In shared me...
Shared memory provides an attractive and intuitive programming model that makes good use of programm...
[[abstract]]©1998 JISE-A multithreaded computer maintains multiple program counters and register fil...
Cache coherence is one of the main challenges to tackle when designing a shared-memory multiprocesso...
In this research we built a SystemC Level-1 data cache system in a distributed shared memory archite...
We argue that OS-provided data coherence on non-cache-coherent NUMA multiprocessors (machines with a...
We compare the performance of three major programming models— a load-store cache-coherent shared add...
200 p.Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 1993.The use of a private cache in...
Cache Coherent Non-Uniform Memory Access (CC-NUMA) architectures have received strong interests from...
In a shared-memory multiprocessor with private caches, cached copies of a data item must be kept con...
In recent years, much effort has been devoted to analyzing the performance of distributed memory sys...