Performance Evaluation of Memory Allocation Schemes on CC-NUMA Multiprocessors

Cache Coherent Non-Uniform Memory Access (CC-NUMA) architectures have received strong interests from both academia and industries. This paper studies the performance impact of design choices at different levels of address and memory mapping on CC-NUMA architectures. Through execution-driven simulations of five numerical programs, we find close interactions between data allocation, global address translation and cache set-addressing. Our results strongly discourage the use of direct-mapped caches in CC-NUMA machines. Results also show that data allocation often makes a great impact on memory miss ratio and execution time. A compiler scheme which allocates data and parallel tasks simultaneously is shown to perform quite well consistently. Keywords -- CC-NUMA, Data Allocation, Cache Mapping, Memory Management, Parallel Task Allocation 1 Introduction In recent years, we see a trend toward the Cache Coherent Non-Uniform Memory Access (CC-NUMA) architecture in multiprocessors. Systems based..