Multi-profile Instruction Based Compression

Code compression has been used to minimize the memory area requirement of embedded systems. Recently, performance improvement and energy consumption reductionare observed as a by-product of compression. In this paper we propose a novel technique for efficiently exploring the trade-offs involved in code compression. Our Multi-Profile approach to build dictionaries combines the best features of both static and dynamic program behaviors. The experiments with Mediabench and MiBench suites and the Leon (SPARCv8) processor reveals a compression ratio as low as 71% while performance speed-up reaches 1.5. © 2004 IEEE.2329Araujo, G., Centoducatte, P., Azevedo, R., Pannain, R., Expression tree based algorithms for code compression on embedded RISC architectures (2000) IEEE Transactions on VLSI Systems, , MarAraujo, G., Centoducatte, P., Côrtes, M., Pannain, R., Code compression based on operand factorization (1998) Proc. Int'l Symp. on Microarchitecture, pp. 194-201. , Dec(1995) An Introduction to Thumb, , Advanced RISC Machines Ltd., MarBenini, L., Macii, A., Macii, E., Poncino, M., Selective instruction compression for memory energy reduction in embedded systems (1999) Proc. Int'l. Symp. on Low-power Electronics and Design, pp. 206-211De Azevedo, R.J., (2002) Uma Arquitetura Para Execução de Código Comprimido em Sistemas Dedicados, , PhD thesis, Institute de Computação - UNICAMP, JunDebray, S., Evans, W., Muth, R., Compiler techniques for code compression (1999) Workshop on Compiler Support for System Software, , May. Note: Preliminary version of article in ACM Transactions on Programming Languages and SystemsGaisler, G., (2003) Leon, , http://www.gaisler.com, [OnLine], OctGame, M., Booker, A., (1998) CodePack: Code Compression for PowerPC Processors, , International Business Machines (IBM) CorporationGuthaus, M., Ringenberg, J., Ernst, D., Austin, T., Mudge, T., Mibench: A free, commercially representative embedded benchmark suite (2001) Proc. of the IEEE 4th Annual Workshop on Workload Characterization, pp. 3-14. , DecKissell, K., (1997) MIPS16: High-density MIPS for the Embedded Market, , Silicon Graphics MIPS GroupLee, C., Potkonjak, M., Mangione-Smith, W., (1997) Mediabench: A Tool for Evaluating and Synthesizing Multimedia Communication Systems, pp. 330-337. , DecLefurgy, C., Bird, P., Chen, I.-C., Mudge, T., Improving code density using compression techniques (1997) Proc. Int'l Symp. on Microarchitecture, , DecLefurgy, C., Piccininni, E., Mudge, T., Analysis of a high-performance code compression method (1999) Proc. Int'l Symp. on Microarchitecture, , NovLekatsas, H., Henkel, J., Jakkula, V., Design of a one-cycle decompression hardware for performance increase in embedded systems (2002) Proc. ACM/IEEE Design Automation Conference, pp. 34-39. , JuneLekatsas, H., Henkel, J., Wolf, W., Code compression for low power embedded system design (2000) Proc. ACM/IEEE Design Automation ConferenceLekatsas, H., Wolf, W., Code compression for embedded systems (1998) Proc. ACM/IEEE Design Automation ConferenceLekatsas, H., Wolf, W., SAMC: A code compression algorithm for embedded processors (1999) IEEE Transactions on CAD, 18 (12), pp. 1689-1701. , DecNetto, E.W., Azevedo, R., Centoducatte, P., Araujo, G., Multi-profile based code compression (2004) Design Automation Conference, DAC04, , To appear inWolfe, A., Chanin, A., Executing compressed programs on an embedded RISC architecture (1992) Proc. Int'l Symp. on Microarchitectur