Improving bug predictions in multicore cyber-physical systems

As physical limits began to negate the assumption known as Moore’s law, chip manufacturers started focusing on multicore architectures as the main solution to improve the processing power in modern computers. Today, multicore CPUs are commonly found in servers, PCs, smartphone, cars, airplanes, and home appliances. As this happens, more and more programs are designed with some degree of parallelism to take advantage of these implicitly concurrent architectures. In this context, new challenges are presented to software engineers. For example, software validation becomes much more expensive (since testing concurrency is difficult) and strategies such as bug prediction could be used to better focus the effort during the development process. However, most of the existing bug prediction approaches have been designed with sequential programs in mind. In this paper, we propose a novel set of concurrency-related source code metrics to be used as the basis for bug prediction methods; we discuss our approach with respect to the existing state of the art, and we outline the research challenges that have to be addressed to realize our goal