An integrated receiver consisting of RF front ends, analog baseband chain with an analog to digital converter (ADC) for a Synthetic Aperture Radar (SAR) implemented in 130 nm CMOS technology is presented in this paper. The circuits are integrated on a single chip with a size of 10.88 mm2. The RF front end consists of three parallel signal channels intended for L,C and X-band of the SAR receiver. The baseband (BB) is selectable between 50 MHz and 160 MHz bandwidths through switches. The ADC has selectable mode of 5, 6, 7 and 8 bits via control switches. The receiver has a nominal gain of 40 dB and 37 dB and noise figure of 11 dB and 13.5 dB for 160 MHz BB filter at room temperature for L-band and C-band, respectively. The circuits, which use...
This paper presents a new structure of column-level successive approximation register(SAR) analogue-...
The purpose of this paper is to introduce the feasibility study of a multi-band SAR based on an emer...
This paper presents a low power successive approximation register (SAR) ADC and its front-end automa...
An integrated receiver consisting of RF front ends, analog baseband chain with an analog to digital ...
An integrated receiver consisting of RF front ends, analog baseband (BB) chain with an analog to dig...
Recent advances in technologies, architectures, and applications of highly-integrated low-power rada...
This paper presents a co-design of a 10-bit SAR ADC and its front-end filter. Because the SAR ADC wo...
A 12-bit analog-to-digital converter (ADC) addressed to Silicon-Drift Detectors (SDDs) multichannel ...
A 60-Channels ADC (Analog to Digital Converter) board for space borne Digital Beam Forming (DBF) Syn...
This paper presents a fully differential 12-bit SAR ADC developed for high-voltage CMOS sensors. The...
approximation register (SAR) analog-to-digital converter (ADC) is fabricated in 65-nm CMOS. With the...
The design and measurement results of a fast, ultra-low power, small area 10-bit SAR ADC, developed ...
An ADC featuring a new architecture for an 8 b 64× interleaved CMOS ADC running at up to 100 GHz sam...
The design and performance of a low power GaAs multi-function X-band MMIC for space-based synthetic ...
This paper presents a 1.25-GS/s 7-b single-channel successive approximation register (SAR) an...
This paper presents a new structure of column-level successive approximation register(SAR) analogue-...
The purpose of this paper is to introduce the feasibility study of a multi-band SAR based on an emer...
This paper presents a low power successive approximation register (SAR) ADC and its front-end automa...
An integrated receiver consisting of RF front ends, analog baseband chain with an analog to digital ...
An integrated receiver consisting of RF front ends, analog baseband (BB) chain with an analog to dig...
Recent advances in technologies, architectures, and applications of highly-integrated low-power rada...
This paper presents a co-design of a 10-bit SAR ADC and its front-end filter. Because the SAR ADC wo...
A 12-bit analog-to-digital converter (ADC) addressed to Silicon-Drift Detectors (SDDs) multichannel ...
A 60-Channels ADC (Analog to Digital Converter) board for space borne Digital Beam Forming (DBF) Syn...
This paper presents a fully differential 12-bit SAR ADC developed for high-voltage CMOS sensors. The...
approximation register (SAR) analog-to-digital converter (ADC) is fabricated in 65-nm CMOS. With the...
The design and measurement results of a fast, ultra-low power, small area 10-bit SAR ADC, developed ...
An ADC featuring a new architecture for an 8 b 64× interleaved CMOS ADC running at up to 100 GHz sam...
The design and performance of a low power GaAs multi-function X-band MMIC for space-based synthetic ...
This paper presents a 1.25-GS/s 7-b single-channel successive approximation register (SAR) an...
This paper presents a new structure of column-level successive approximation register(SAR) analogue-...
The purpose of this paper is to introduce the feasibility study of a multi-band SAR based on an emer...
This paper presents a low power successive approximation register (SAR) ADC and its front-end automa...