International audienceThis work studies hardware-specific optimization opportunities currently unexploited by HLS compilers. Some of these optimizations are specializations of floating-point operations. They respect the usual semantics of the input program. Other optimizations do not, assuming instead that a floating-point computation is actually intended to compute with real numbers. What matters then is to respect application-level accuracy constraints, expressed as pragmas in the source code. This provides the compiler with freedom to use non-standard arithmetic when more efficient. A source-to-source compiler is used to prototype the proposed optimizations and evaluate them on relevant benchmarks
International audienceHigh-Level Synthesis (HLS) is a potential solution to increase the productivit...
Many scenarios demand a high processing power often combined with a limited energy budget. A way to ...
High-level synthesis (HLS) enables automated conversion of high-level language algorithms into synth...
International audienceThis work studies hardware-specific optimization opportunities currently unexp...
On the one hand, a strength of FPGAs is their ability to perform non-standard computations not suppo...
International audienceFPGAs are well known for their ability to perform non-standard computations no...
International audienceHigh-level synthesis (HLS) is a big step forward in terms of design productivi...
High-Level Synthesis (HLS) tools usually treat floating-point operators as black-box IP cores, and t...
High-level synthesis (HLS) tools offer increased productivity regarding FPGA programming. However, d...
Abstract—We consider the impact of compiler optimizations on the quality of high-level synthesis (HL...
High-level Synthesis (HLS) tools have greatly increased the productivity of FPGA application develop...
We present a methodology for generating floating-point arithmetic hardware designs which are, for su...
High-level synthesis is a novel method to generate a RT-level hardware description automatically fro...
High-level synthesis is a design process which takes an un-timed, behavioral description in a high-l...
International audienceRecent studies have shown that High-Level Synthesis (HLS) is an efficient way ...
International audienceHigh-Level Synthesis (HLS) is a potential solution to increase the productivit...
Many scenarios demand a high processing power often combined with a limited energy budget. A way to ...
High-level synthesis (HLS) enables automated conversion of high-level language algorithms into synth...
International audienceThis work studies hardware-specific optimization opportunities currently unexp...
On the one hand, a strength of FPGAs is their ability to perform non-standard computations not suppo...
International audienceFPGAs are well known for their ability to perform non-standard computations no...
International audienceHigh-level synthesis (HLS) is a big step forward in terms of design productivi...
High-Level Synthesis (HLS) tools usually treat floating-point operators as black-box IP cores, and t...
High-level synthesis (HLS) tools offer increased productivity regarding FPGA programming. However, d...
Abstract—We consider the impact of compiler optimizations on the quality of high-level synthesis (HL...
High-level Synthesis (HLS) tools have greatly increased the productivity of FPGA application develop...
We present a methodology for generating floating-point arithmetic hardware designs which are, for su...
High-level synthesis is a novel method to generate a RT-level hardware description automatically fro...
High-level synthesis is a design process which takes an un-timed, behavioral description in a high-l...
International audienceRecent studies have shown that High-Level Synthesis (HLS) is an efficient way ...
International audienceHigh-Level Synthesis (HLS) is a potential solution to increase the productivit...
Many scenarios demand a high processing power often combined with a limited energy budget. A way to ...
High-level synthesis (HLS) enables automated conversion of high-level language algorithms into synth...