This article presents an in-circuit emulation (ICE) module that can be embedded with a microprocessr core. The ICE module, based on the IEEE 1149.1 JTAG architecture, supports typical debugging and testing mechanisms, including boundary scan paths, partial scan paths, single stepping, internal resource monitoring and modification, breakpoint detection, and mode switching between debugging and normal modes. The architecture of the ICE module is parameterized and retargetable to different microprocessors. It has been successfully integrated with two microprocessors with significantly different architectures: one 8-bit industrial embedded microcontroller HT48x00 and one 32-bit ARM7-like embedded microprocessors. Both FPGA prototypes and chip i...
Abstract—We propose new hardware and software techniques for FPGA functional debug that leverage the...
Reconfigurable computing is an old concept that during the past couple of decades has become increas...
This article proposes a closer-to-metal approach of RTL inspection in microprocessor design for use ...
In this paper, we introduce a method that synthesizes the ICE (In-Circuit Emulator) and microcontrol...
Recently, there has been a significant increase in design complexity for Embedded Systems often refe...
Abstract: Description of the development of a debug system for a PIC™-compatible SoC microcontroller...
Microprocessor-based systems are usually debugged with the help of in-circuit emulators and logic an...
[[abstract]]The purpose of this thesis is to combine 8051 microprocessor with extensible JTAG hardwa...
We present an on-chip emulation strategy using the ASICs built-in chip test support circuitry. Scan-...
Reprogrammable hardware systems are traditionally very difficult to debug due to their high level of...
The increasing complexity of VLSI circuits and the reduced accessibility of modern packaging and mou...
Modern trends in technology require efficient control and processing platforms based on connected so...
Recently, there has been a significant increase in design complexity for Embedded Systems often refe...
Increasingly complicated VLSI design or system-on-chip (SOC) makes FPGA-based emulation necessary. A...
This paper presents a new approach to the design of embedded systems. Due to restrictions that state...
Abstract—We propose new hardware and software techniques for FPGA functional debug that leverage the...
Reconfigurable computing is an old concept that during the past couple of decades has become increas...
This article proposes a closer-to-metal approach of RTL inspection in microprocessor design for use ...
In this paper, we introduce a method that synthesizes the ICE (In-Circuit Emulator) and microcontrol...
Recently, there has been a significant increase in design complexity for Embedded Systems often refe...
Abstract: Description of the development of a debug system for a PIC™-compatible SoC microcontroller...
Microprocessor-based systems are usually debugged with the help of in-circuit emulators and logic an...
[[abstract]]The purpose of this thesis is to combine 8051 microprocessor with extensible JTAG hardwa...
We present an on-chip emulation strategy using the ASICs built-in chip test support circuitry. Scan-...
Reprogrammable hardware systems are traditionally very difficult to debug due to their high level of...
The increasing complexity of VLSI circuits and the reduced accessibility of modern packaging and mou...
Modern trends in technology require efficient control and processing platforms based on connected so...
Recently, there has been a significant increase in design complexity for Embedded Systems often refe...
Increasingly complicated VLSI design or system-on-chip (SOC) makes FPGA-based emulation necessary. A...
This paper presents a new approach to the design of embedded systems. Due to restrictions that state...
Abstract—We propose new hardware and software techniques for FPGA functional debug that leverage the...
Reconfigurable computing is an old concept that during the past couple of decades has become increas...
This article proposes a closer-to-metal approach of RTL inspection in microprocessor design for use ...