In this paper we present an algorithm for system level hardware/software partitioning of heterogeneous embedded systems. The system is represented as an abstract graph which captures both data-flow and the flow of control. Given an architecture consisting of several processors, ASICs and shared busses, our partitioning algorithm finds the partitioning with the smallest hardware cost and is able to predict and guarantee the performance of the system in terms of worst case delay.
In this paper, we address the problem of optimal distribu-tion of computational tasks on a network o...
In system-level design, applications are represented as task graphs where tasks (called nodes) have ...
Abstract—In this paper we are interested in mixed-criticality embedded real-time applications mapped...
Abstract. The paper proposes a novel heuristic technique for integrated hardware-software partitioni...
Abstract—In order to improve system performance efficiently, a number of systems choose to equip mul...
Hardware/Software partitioning is one of the most important issues of codesign of embedded systems, ...
Partitioning a system's functionality among interacting hardware and software components is an impor...
In this paper, we present a functional partitioning method for low power real-time distributed embed...
Abstract Existing partitioning algorithms provide limited support for load balancing simulations tha...
There has been a recent increase of interest in heterogeneous computing systems, due partly to the f...
Hardware accelerators, such as those based on GPUs and FPGAs, offer an excellent opportunity to effi...
This paper addresses the problem of designing heterogeneous multiprocessor embedded systems. The pap...
Existing partitioning algorithms provide limited support for load balancing simulations that are per...
One of the major differences in partitioning for co-design is in the way the communication cost is e...
Existing partitioning algorithms provide limited support for load balancing simulations that are per...
In this paper, we address the problem of optimal distribu-tion of computational tasks on a network o...
In system-level design, applications are represented as task graphs where tasks (called nodes) have ...
Abstract—In this paper we are interested in mixed-criticality embedded real-time applications mapped...
Abstract. The paper proposes a novel heuristic technique for integrated hardware-software partitioni...
Abstract—In order to improve system performance efficiently, a number of systems choose to equip mul...
Hardware/Software partitioning is one of the most important issues of codesign of embedded systems, ...
Partitioning a system's functionality among interacting hardware and software components is an impor...
In this paper, we present a functional partitioning method for low power real-time distributed embed...
Abstract Existing partitioning algorithms provide limited support for load balancing simulations tha...
There has been a recent increase of interest in heterogeneous computing systems, due partly to the f...
Hardware accelerators, such as those based on GPUs and FPGAs, offer an excellent opportunity to effi...
This paper addresses the problem of designing heterogeneous multiprocessor embedded systems. The pap...
Existing partitioning algorithms provide limited support for load balancing simulations that are per...
One of the major differences in partitioning for co-design is in the way the communication cost is e...
Existing partitioning algorithms provide limited support for load balancing simulations that are per...
In this paper, we address the problem of optimal distribu-tion of computational tasks on a network o...
In system-level design, applications are represented as task graphs where tasks (called nodes) have ...
Abstract—In this paper we are interested in mixed-criticality embedded real-time applications mapped...