Non-uniform temperature profiles along global interconnect lines in high-performance ICs can significantly impact the performance of these lines. This paper presents a detailed analysis and modeling of the interconnect performance degradation due to non-uniform temperature profiles that exist along their lengths, which in turn arise due to the thermal gradients in the underlying substrate. A nonuniform temperature-dependent distributed RC interconnect delay model is proposed for the first time. The model has been applied to a wide variety of interconnect layouts and temperature distributions to quantify the impact on signal integrity issues including clock skew fluctuations.
The aggressive scaling of CMOS technology toward nanometer lengths contributed to the surfacing of m...
The resistance of on-chip interconnects and the current drive of transistors is strongly temperature...
Abstract—Thermal effects are becoming a limiting factor in high-performance circuit design due to th...
In traditional design flows the temperature of the chip is assumed to be uniform across the substrat...
Abstract- This paper presents the analysis and modeling of the nonuniform substrate temperature in h...
Abstract- This paper presents the analysis and modeling of the nonuniform substrate temperature in h...
Thermal and time delay aspects of long interconnect lines have been investigated. To design a modern...
Thermal and time delay aspects of long interconnect lines have been investigated. To design a modern...
Abstract. Thermal and time delay aspects of long interconnect lines have been investigated. To desig...
Thermal effects are becoming a limiting factor in high performance circuit design due to the strong ...
Global interconnect reliability is becoming a bigger issue as we scale down further into the submicr...
Abstract: We present a methodology to study the impact of spatial pattem dependent variation on circ...
Thermal effects are becoming a limiting factor in highperformance circuit design due to the strong t...
Thermal and time delay aspects of long interconnect lines have been investigated. To design a modern...
Since the first chip was manufactured in a CMOS technology there has been a drive to shrink dimensio...
The aggressive scaling of CMOS technology toward nanometer lengths contributed to the surfacing of m...
The resistance of on-chip interconnects and the current drive of transistors is strongly temperature...
Abstract—Thermal effects are becoming a limiting factor in high-performance circuit design due to th...
In traditional design flows the temperature of the chip is assumed to be uniform across the substrat...
Abstract- This paper presents the analysis and modeling of the nonuniform substrate temperature in h...
Abstract- This paper presents the analysis and modeling of the nonuniform substrate temperature in h...
Thermal and time delay aspects of long interconnect lines have been investigated. To design a modern...
Thermal and time delay aspects of long interconnect lines have been investigated. To design a modern...
Abstract. Thermal and time delay aspects of long interconnect lines have been investigated. To desig...
Thermal effects are becoming a limiting factor in high performance circuit design due to the strong ...
Global interconnect reliability is becoming a bigger issue as we scale down further into the submicr...
Abstract: We present a methodology to study the impact of spatial pattem dependent variation on circ...
Thermal effects are becoming a limiting factor in highperformance circuit design due to the strong t...
Thermal and time delay aspects of long interconnect lines have been investigated. To design a modern...
Since the first chip was manufactured in a CMOS technology there has been a drive to shrink dimensio...
The aggressive scaling of CMOS technology toward nanometer lengths contributed to the surfacing of m...
The resistance of on-chip interconnects and the current drive of transistors is strongly temperature...
Abstract—Thermal effects are becoming a limiting factor in high-performance circuit design due to th...