Add to ORKGAbstract- This paper presents the analysis and modeling of the nonuniform substrate temperature in high performance ICs and its effect on the integrity of the clock signal. Using a novel non-uniform temperature-dependent distributed RC interconnect delay model, the behavior of clock skew in presence of the substrate thermal gradients is analyzed and some design guidelines are provided to ensure the integrity of the clock signal. I
Clock distribution network is sensitive to large thermal gradients on the die as the performance of ...
Thermal and time delay aspects of long interconnect lines have been investigated. To design a modern...
This paper provides an overview of various thermal issues in high-performance VLSI with especial att...
Abstract- This paper presents the analysis and modeling of the nonuniform substrate temperature in h...
In traditional design flows the temperature of the chip is assumed to be uniform across the substrat...
Non-uniform temperature profiles along global interconnect lines in high-performance ICs can signifi...
The existence of non-uniform thermal gradients on the substrate in high performance IC's can signifi...
The existence of non-uniform thermal gradients on the substrate in high performance IC's can signifi...
The aggressive scaling of CMOS technology toward nanometer lengths contributed to the surfacing of m...
Power densities and temperatures in today's high performance circuits have reached alarmingly high l...
Power densities and temperatures in today's high performance circuits have reached alarmingly high l...
Chip heating and nonuniform distribution of hot and cool zones on the die negatively affect reliabil...
Clock distribution network is sensitive to large thermal gradients on the die as the performance of ...
Temperature has traditionally been a key parameter to take into account during the many stages of IC...
Temperature has traditionally been a key parameter to take into account during the many stages of IC...
Clock distribution network is sensitive to large thermal gradients on the die as the performance of ...
Thermal and time delay aspects of long interconnect lines have been investigated. To design a modern...
This paper provides an overview of various thermal issues in high-performance VLSI with especial att...
Abstract- This paper presents the analysis and modeling of the nonuniform substrate temperature in h...
In traditional design flows the temperature of the chip is assumed to be uniform across the substrat...
Non-uniform temperature profiles along global interconnect lines in high-performance ICs can signifi...
The existence of non-uniform thermal gradients on the substrate in high performance IC's can signifi...
The existence of non-uniform thermal gradients on the substrate in high performance IC's can signifi...
The aggressive scaling of CMOS technology toward nanometer lengths contributed to the surfacing of m...
Power densities and temperatures in today's high performance circuits have reached alarmingly high l...
Power densities and temperatures in today's high performance circuits have reached alarmingly high l...
Chip heating and nonuniform distribution of hot and cool zones on the die negatively affect reliabil...
Clock distribution network is sensitive to large thermal gradients on the die as the performance of ...
Temperature has traditionally been a key parameter to take into account during the many stages of IC...
Temperature has traditionally been a key parameter to take into account during the many stages of IC...
Clock distribution network is sensitive to large thermal gradients on the die as the performance of ...
Thermal and time delay aspects of long interconnect lines have been investigated. To design a modern...
This paper provides an overview of various thermal issues in high-performance VLSI with especial att...