The fast development of many different ASIPs make demands of rapid availability of dedicated compilers. Fast retargeting is a major aspect, while fast compilation times are of minor importance. There are also new demands in the quality of the generated code. Irregular properties together with fine–grain parallelism given by a target architecture have to be effectively supported by the compiler. This report is focused on the traditional tasks of code generation — code selection, register allocation, andinstruction scheduling. The major subject is to expose the tendencies of research of code generation techniques in recent years, and survey their features with regards to support for irregular architectures, fine–grain parallelism, retargetabi...
Abstract-- Many research groups have addressed code generation issues for a long time, and have achi...
Data-parallel languages, such as H scIGH P scERFORMANCE F scORTRAN or F scORTRAN D, provide a machin...
In this thesis we address the problem of optimal code generation for irregular architectures such as...
embedded systems. Retargetable code generation is a co-designing method to map a high-level software...
Phase-decoupled methods for code generation are the state of the art in compilers for standard proce...
The AVIV retargetable code generator produces optimized machine code for target processors with diff...
There are many important applications in computational fluid dynamics, circuit simulation and struct...
Code generation in a compiler is commonly divided into several phases: instruction selection, schedu...
. Many software compilers for embedded processors produce machine code of insufficient quality. Sinc...
Contribution à la compilation de programmes irréguliers pour des architecturescomplexesLes architect...
This paper describes how a runtime support library can be used as compiler runtime support in irregu...
This work was also published as a Rice University thesis/dissertation: http://hdl.handle.net/1911/16...
Automatic partitioning, scheduling and code generation are of major importance in the development of...
153 p.Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 2000.We have studied five differen...
This paper introduces a flexible code generation framework dedicated to the design of application sp...
Abstract-- Many research groups have addressed code generation issues for a long time, and have achi...
Data-parallel languages, such as H scIGH P scERFORMANCE F scORTRAN or F scORTRAN D, provide a machin...
In this thesis we address the problem of optimal code generation for irregular architectures such as...
embedded systems. Retargetable code generation is a co-designing method to map a high-level software...
Phase-decoupled methods for code generation are the state of the art in compilers for standard proce...
The AVIV retargetable code generator produces optimized machine code for target processors with diff...
There are many important applications in computational fluid dynamics, circuit simulation and struct...
Code generation in a compiler is commonly divided into several phases: instruction selection, schedu...
. Many software compilers for embedded processors produce machine code of insufficient quality. Sinc...
Contribution à la compilation de programmes irréguliers pour des architecturescomplexesLes architect...
This paper describes how a runtime support library can be used as compiler runtime support in irregu...
This work was also published as a Rice University thesis/dissertation: http://hdl.handle.net/1911/16...
Automatic partitioning, scheduling and code generation are of major importance in the development of...
153 p.Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 2000.We have studied five differen...
This paper introduces a flexible code generation framework dedicated to the design of application sp...
Abstract-- Many research groups have addressed code generation issues for a long time, and have achi...
Data-parallel languages, such as H scIGH P scERFORMANCE F scORTRAN or F scORTRAN D, provide a machin...
In this thesis we address the problem of optimal code generation for irregular architectures such as...