Partial Redundancy Elimination on Predicated Code

Partial redundancy elimination (PRE) is one of the most widespread optimizations in compilers. However, current PRE-techniques are inadequate to handle predicated code, i.e., programs where instructions are guarded by a 1-bit register that dynamically controls whether the e#ect of instruction should be committed or nullified. In fact, to exclude corrupting the semantics they must be overly conservative making them close to useless. Since predicated code will be more and more common with the advent of the IA-64 architecture, we present here a family of PRE-algorithms tailored for predicated code. Conceptually, the basic element of this family can be considered the counterpart of busy code motion of [20]. It can easily be tuned by two orthogonal means. First, by adjusting the power of a preprocess feeding it by information on predication. Second, by relaxing or strengthening the constraints on synthesizing predicates controlling the movability of computations. Together with extensions towards lazy code motion, this results in a family of PRE-algorithms spanning a range from tamed to quite aggressive algorithms, which is illustrated by various meaningful examples