Conventional speculative architectures use branch prediction to evaluate the most likely execution path during program execution. However, certain branches are difficult to predict. One solution to this problem is to evaluate both paths following such a conditional branch. Predicated execution can be used to implement this form of multi-path execution. Predicated architectures fetch and issue instructions that have associated predicates. These predicates indicate if the instruction should commit its result. Predicating a branch reduces the number of branches executed, eliminating the chance of branch misprediction at the cost of executing additional instructions. In this paper, we propose a restricted form of multi-path execution called Dyn...
Even sophisticated branch-prediction techniques necessarily suffer some mispredictions, and even rel...
If-conversion is a compiler technique that reduces the misprediction penalties caused by hard-to-pre...
Current trends in processor design are pointing to deeper and wider pipelines and superscalar archit...
Predicated execution has been used to reduce the number of branch mispredictions by eliminating hard...
277 p.Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 1997.For many applications, specul...
Predicated Execution has been put forth as a method for improving processor performance by removing ...
High performance architectures have always had to deal with the performance-limiting impact of branc...
Speculative execution has long been used as an approach to exploit instruction level parallelism acr...
In this paper we evaluate the effects of guarded (or conditional, or predicated) execution on the pe...
Architectural support for predicated execution has been proposed as a manner of attacking performanc...
Increasing system complexity of SOC applications leads to an increased need of powerful embedded DSP...
Current trends in processor design are pointing to deeper and wider pipelines and superscalar archit...
Computers are everywhere and the need for always more computation power has pushed the processor arc...
Modern processors remove many artificial constraints on instruction ordering,permitting multiple ins...
Speculative execution of conditional branches has a high hardware cost, is limited by dynamic branc...
Even sophisticated branch-prediction techniques necessarily suffer some mispredictions, and even rel...
If-conversion is a compiler technique that reduces the misprediction penalties caused by hard-to-pre...
Current trends in processor design are pointing to deeper and wider pipelines and superscalar archit...
Predicated execution has been used to reduce the number of branch mispredictions by eliminating hard...
277 p.Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 1997.For many applications, specul...
Predicated Execution has been put forth as a method for improving processor performance by removing ...
High performance architectures have always had to deal with the performance-limiting impact of branc...
Speculative execution has long been used as an approach to exploit instruction level parallelism acr...
In this paper we evaluate the effects of guarded (or conditional, or predicated) execution on the pe...
Architectural support for predicated execution has been proposed as a manner of attacking performanc...
Increasing system complexity of SOC applications leads to an increased need of powerful embedded DSP...
Current trends in processor design are pointing to deeper and wider pipelines and superscalar archit...
Computers are everywhere and the need for always more computation power has pushed the processor arc...
Modern processors remove many artificial constraints on instruction ordering,permitting multiple ins...
Speculative execution of conditional branches has a high hardware cost, is limited by dynamic branc...
Even sophisticated branch-prediction techniques necessarily suffer some mispredictions, and even rel...
If-conversion is a compiler technique that reduces the misprediction penalties caused by hard-to-pre...
Current trends in processor design are pointing to deeper and wider pipelines and superscalar archit...